[Mesa-dev] [PATCH 09/10] i965: Softpin all buffers and never use relocations.

[Kenneth Graunke]

---
 src/mesa/drivers/dri/i965/brw_bufmgr.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

This enables it for Broadwell (with a 64-bit kernel) and Skylake+ (with
any kernel).  Unfortunately, it doesn't enable it for Cherryview as that
has a 32-bit GTT.  We could switch that over as well, but we'd have to
have a single memory zone, which is kind of a special case...

diff --git a/src/mesa/drivers/dri/i965/brw_bufmgr.c b/src/mesa/drivers/dri/i965/brw_bufmgr.c
index 07c0d2f7633..4fd95e1d78c 100644
--- a/src/mesa/drivers/dri/i965/brw_bufmgr.c
+++ b/src/mesa/drivers/dri/i965/brw_bufmgr.c
@@ -1731,7 +1731,7 @@ brw_bufmgr_init(struct gen_device_info *devinfo, int fd)
    if (devinfo->gen >= 8 && gtt_size > _4GB) {
       bufmgr->initial_kflags |= EXEC_OBJECT_SUPPORTS_48B_ADDRESS;
 
-      if (false && gem_param(fd, I915_PARAM_HAS_EXEC_SOFTPIN) > 0) {
+      if (gem_param(fd, I915_PARAM_HAS_EXEC_SOFTPIN) > 0) {
          bufmgr->initial_kflags |= EXEC_OBJECT_PINNED;
 
          util_vma_heap_init(&bufmgr->vma_allocator[BRW_MEMZONE_LOW_4G],
-- 
2.17.0