[Mesa-dev] [PATCH 1/8] i965: Re-emit depth/stencil/hiz on BRW_NEW_AUX_STATE

[Kenneth Graunke]

On Monday, May 7, 2018 12:49:32 PM PDT Jason Ekstrand wrote:
> ---
>  src/mesa/drivers/dri/i965/gen7_misc_state.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/src/mesa/drivers/dri/i965/gen7_misc_state.c b/src/mesa/drivers/dri/i965/gen7_misc_state.c
> index 1ce7658..1508473 100644
> --- a/src/mesa/drivers/dri/i965/gen7_misc_state.c
> +++ b/src/mesa/drivers/dri/i965/gen7_misc_state.c
> @@ -195,7 +195,8 @@ const struct brw_tracked_state gen7_depthbuffer = {
>        .mesa = _NEW_BUFFERS |
>                _NEW_DEPTH |
>                _NEW_STENCIL,
> -      .brw = BRW_NEW_BATCH |
> +      .brw = BRW_NEW_AUX_STATE |
> +             BRW_NEW_BATCH |
>               BRW_NEW_BLORP,
>     },
>     .emit = brw_emit_depthbuffer,
> 

Changes like this warrant an explanation - is this fixing any known
issues?  Found by inspection?

I was surprised to see this, as BRW_NEW_AUX_STATE is usually about color
surfaces - CCS_E compression, CCS_D fast clears...not HiZ.  But I see
that intel_miptree_make_shareable might deal with HiZ...as does depth
clear values...as does set_aux_state...so it certainly seems plausible.

Still, I'm curious to know if you were thinking of anything specific.
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