[Mesa-dev] [PATCH 7/9] i965: Use blorp_ccs_op for CCS fast-clears

Iago Toral itoral at igalia.com
Wed May 16 11:13:27 UTC 2018


On Tue, 2018-05-15 at 15:28 -0700, Jason Ekstrand wrote:
> ---
>  src/mesa/drivers/dri/i965/brw_blorp.c | 12 +++++++++---
>  1 file changed, 9 insertions(+), 3 deletions(-)
> 
> diff --git a/src/mesa/drivers/dri/i965/brw_blorp.c
> b/src/mesa/drivers/dri/i965/brw_blorp.c
> index dab04f2..b6097f5 100644
> --- a/src/mesa/drivers/dri/i965/brw_blorp.c
> +++ b/src/mesa/drivers/dri/i965/brw_blorp.c
> @@ -1260,9 +1260,15 @@ do_single_blorp_clear(struct brw_context *brw,
> struct gl_framebuffer *fb,
>  
>        struct blorp_batch batch;
>        blorp_batch_init(&brw->blorp, &batch, brw, 0);
> -      blorp_fast_clear(&batch, &surf, isl_format,
> -                       level, irb->mt_layer, num_layers,
> -                       x0, y0, x1, y1);
> +      if (surf.aux_usage == ISL_AUX_USAGE_CCS_E ||
> +          surf.aux_usage == ISL_AUX_USAGE_CCS_D) {
> +         blorp_ccs_op(&batch, &surf, level, irb->mt_layer,
> num_layers,
> +                      isl_format, ISL_AUX_OP_FAST_CLEAR);
> +      } else {
> +         blorp_fast_clear(&batch, &surf, isl_format,
> +                          level, irb->mt_layer, num_layers,
> +                          x0, y0, x1, y1);
> +      }

On its own, this looks a bit weird, but reading further into the series
this seems to be preparation for the last patch in the series.

>        blorp_batch_finish(&batch);
>  
>        brw_emit_end_of_pipe_sync(brw,
> PIPE_CONTROL_RENDER_TARGET_FLUSH);


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