[Mesa-dev] [PATCH 3/4] i965: Enable fast detiling paths for !llc

[Chris Wilson]

Now that we have enabled cache-line at a time transfers to and from GPU
memory, we can accelerate access into !llc (WC) memory just as well as
WB memory with llc.
---
 src/mesa/drivers/dri/i965/brw_bufmgr.c         |  2 +-
 src/mesa/drivers/dri/i965/intel_pixel_read.c   |  5 ++---
 src/mesa/drivers/dri/i965/intel_tex_image.c    | 12 ++++++------
 src/mesa/drivers/dri/i965/intel_tiled_memcpy.c | 17 ++++++++++++++++-
 src/mesa/drivers/dri/i965/intel_tiled_memcpy.h |  3 ++-
 5 files changed, 27 insertions(+), 12 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_bufmgr.c b/src/mesa/drivers/dri/i965/brw_bufmgr.c
index 66828f319be..fd9e8c49b13 100644
--- a/src/mesa/drivers/dri/i965/brw_bufmgr.c
+++ b/src/mesa/drivers/dri/i965/brw_bufmgr.c
@@ -925,7 +925,7 @@ can_map_cpu(struct brw_bo *bo, unsigned flags)
     * the GPU for blits or other operations, causing batches to happen at
     * inconvenient times.
     */
-   if (flags & (MAP_PERSISTENT | MAP_COHERENT | MAP_ASYNC))
+   if (flags & (MAP_PERSISTENT | MAP_COHERENT | MAP_ASYNC | MAP_RAW))
       return false;
 
    return !(flags & MAP_WRITE);
diff --git a/src/mesa/drivers/dri/i965/intel_pixel_read.c b/src/mesa/drivers/dri/i965/intel_pixel_read.c
index a545d215ad6..57df1178417 100644
--- a/src/mesa/drivers/dri/i965/intel_pixel_read.c
+++ b/src/mesa/drivers/dri/i965/intel_pixel_read.c
@@ -91,8 +91,7 @@ intel_readpixels_tiled_memcpy(struct gl_context * ctx,
     * a 2D BGRA, RGBA, L8 or A8 texture. It could be generalized to support
     * more types.
     */
-   if (!devinfo->has_llc ||
-       pixels == NULL ||
+   if (pixels == NULL ||
        _mesa_is_bufferobj(pack->BufferObj) ||
        pack->Alignment > 4 ||
        pack->SkipPixels > 0 ||
@@ -115,7 +114,7 @@ intel_readpixels_tiled_memcpy(struct gl_context * ctx,
       return false;
 
    mem_copy_fn mem_copy =
-      intel_get_memcpy(rb->Format, format, type, INTEL_DOWNLOAD);
+      intel_get_memcpy(rb->Format, format, type, INTEL_DOWNLOAD, devinfo);
    if (mem_copy == NULL)
       return false;
 
diff --git a/src/mesa/drivers/dri/i965/intel_tex_image.c b/src/mesa/drivers/dri/i965/intel_tex_image.c
index de8832812c1..5afc8d99462 100644
--- a/src/mesa/drivers/dri/i965/intel_tex_image.c
+++ b/src/mesa/drivers/dri/i965/intel_tex_image.c
@@ -196,8 +196,7 @@ intel_texsubimage_tiled_memcpy(struct gl_context * ctx,
     * with _mesa_image_row_stride. However, before removing the restrictions
     * we need tests.
     */
-   if (!devinfo->has_llc ||
-       !(texImage->TexObject->Target == GL_TEXTURE_2D ||
+   if (!(texImage->TexObject->Target == GL_TEXTURE_2D ||
          texImage->TexObject->Target == GL_TEXTURE_RECTANGLE) ||
        pixels == NULL ||
        _mesa_is_bufferobj(packing->BufferObj) ||
@@ -218,7 +217,8 @@ intel_texsubimage_tiled_memcpy(struct gl_context * ctx,
       return false;
 
    mem_copy_fn mem_copy =
-      intel_get_memcpy(texImage->TexFormat, format, type, INTEL_UPLOAD);
+      intel_get_memcpy(texImage->TexFormat, format, type,
+                       INTEL_UPLOAD, devinfo);
    if (mem_copy == NULL)
       return false;
 
@@ -700,8 +700,7 @@ intel_gettexsubimage_tiled_memcpy(struct gl_context *ctx,
     * with _mesa_image_row_stride. However, before removing the restrictions
     * we need tests.
     */
-   if (!devinfo->has_llc ||
-       !(texImage->TexObject->Target == GL_TEXTURE_2D ||
+   if (!(texImage->TexObject->Target == GL_TEXTURE_2D ||
          texImage->TexObject->Target == GL_TEXTURE_RECTANGLE) ||
        pixels == NULL ||
        _mesa_is_bufferobj(packing->BufferObj) ||
@@ -715,7 +714,8 @@ intel_gettexsubimage_tiled_memcpy(struct gl_context *ctx,
       return false;
 
    mem_copy_fn mem_copy =
-      intel_get_memcpy(texImage->TexFormat, format, type, INTEL_DOWNLOAD);
+      intel_get_memcpy(texImage->TexFormat, format, type,
+                       INTEL_DOWNLOAD, devinfo);
    if (mem_copy == NULL)
       return false;
 
diff --git a/src/mesa/drivers/dri/i965/intel_tiled_memcpy.c b/src/mesa/drivers/dri/i965/intel_tiled_memcpy.c
index abe0f804f37..ae4144904f6 100644
--- a/src/mesa/drivers/dri/i965/intel_tiled_memcpy.c
+++ b/src/mesa/drivers/dri/i965/intel_tiled_memcpy.c
@@ -1004,11 +1004,18 @@ tiled_to_linear(uint32_t xt1, uint32_t xt2,
  */
 mem_copy_fn intel_get_memcpy(mesa_format tiledFormat,
                              GLenum format, GLenum type,
-                             enum intel_memcpy_direction direction)
+                             enum intel_memcpy_direction direction,
+                             const struct gen_device_info *devinfo)
 {
    mesa_format user_format;
    mem_copy_fn fn = NULL;
 
+   /* movntdqa support is required for fast reads */
+#if !defined(USE_SSE41)
+   if (direction == INTEL_DOWNLOAD && !devinfo->has_llc)
+      return false;
+#endif
+
    if (type == GL_BITMAP)
       return NULL;
 
@@ -1066,5 +1073,13 @@ mem_copy_fn intel_get_memcpy(mesa_format tiledFormat,
       break;
    }
 
+   /* Only the default read path is accelerated for !llc */
+   if (direction == INTEL_DOWNLOAD && !devinfo->has_llc) {
+      if (fn == memcpy)
+         fn = (mem_copy_fn)_mesa_streaming_load_memcpy;
+      else
+         fn = NULL;
+   }
+
    return fn;
 }
diff --git a/src/mesa/drivers/dri/i965/intel_tiled_memcpy.h b/src/mesa/drivers/dri/i965/intel_tiled_memcpy.h
index e9c43920a17..92ea32938a1 100644
--- a/src/mesa/drivers/dri/i965/intel_tiled_memcpy.h
+++ b/src/mesa/drivers/dri/i965/intel_tiled_memcpy.h
@@ -69,6 +69,7 @@ enum intel_memcpy_direction {
 
 mem_copy_fn intel_get_memcpy(mesa_format tiledFormat,
                              GLenum format, GLenum type,
-                             enum intel_memcpy_direction direction);
+                             enum intel_memcpy_direction direction,
+                             const struct gen_device_info *devinfo);
 
 #endif /* INTEL_TILED_MEMCPY */
-- 
2.17.0