[Mesa-dev] [PATCH A 15/15] nir: Make boolean conversions unsized like other types

Jason Ekstrand jason at jlekstrand.net
Fri Nov 9 03:45:16 UTC 2018


---
 src/compiler/glsl/glsl_to_nir.cpp   |  2 +-
 src/compiler/nir/nir_builder.h      | 12 ++++++++++++
 src/compiler/nir/nir_lower_idiv.c   |  2 +-
 src/compiler/nir/nir_lower_int64.c  |  2 +-
 src/compiler/nir/nir_opcodes.py     | 11 +++++++----
 src/compiler/spirv/vtn_glsl450.c    |  4 ++--
 src/intel/compiler/brw_fs_nir.cpp   |  2 +-
 src/intel/compiler/brw_vec4_nir.cpp |  2 +-
 src/mesa/program/prog_to_nir.c      |  4 ++--
 9 files changed, 28 insertions(+), 13 deletions(-)

diff --git a/src/compiler/glsl/glsl_to_nir.cpp b/src/compiler/glsl/glsl_to_nir.cpp
index 0479f8fcfe4..08ed01a3f6c 100644
--- a/src/compiler/glsl/glsl_to_nir.cpp
+++ b/src/compiler/glsl/glsl_to_nir.cpp
@@ -1516,7 +1516,7 @@ nir_visitor::visit(ir_expression *ir)
       result = supports_ints ? nir_u2f32(&b, srcs[0]) : nir_fmov(&b, srcs[0]);
       break;
    case ir_unop_b2f:
-      result = supports_ints ? nir_b2f(&b, srcs[0]) : nir_fmov(&b, srcs[0]);
+      result = supports_ints ? nir_b2f32(&b, srcs[0]) : nir_fmov(&b, srcs[0]);
       break;
    case ir_unop_f2i:
    case ir_unop_f2u:
diff --git a/src/compiler/nir/nir_builder.h b/src/compiler/nir/nir_builder.h
index f79e0114cda..571a2bb84e8 100644
--- a/src/compiler/nir/nir_builder.h
+++ b/src/compiler/nir/nir_builder.h
@@ -837,6 +837,18 @@ nir_load_param(nir_builder *build, uint32_t param_idx)
 
 #include "nir_builder_opcodes.h"
 
+static inline nir_ssa_def *
+nir_f2b(nir_builder *build, nir_ssa_def *f)
+{
+   return nir_f2b32(build, f);
+}
+
+static inline nir_ssa_def *
+nir_i2b(nir_builder *build, nir_ssa_def *i)
+{
+   return nir_i2b32(build, i);
+}
+
 static inline nir_ssa_def *
 nir_load_barycentric(nir_builder *build, nir_intrinsic_op op,
                      unsigned interp_mode)
diff --git a/src/compiler/nir/nir_lower_idiv.c b/src/compiler/nir/nir_lower_idiv.c
index 194ca5a75a8..b2a0a3c1899 100644
--- a/src/compiler/nir/nir_lower_idiv.c
+++ b/src/compiler/nir/nir_lower_idiv.c
@@ -95,7 +95,7 @@ convert_instr(nir_builder *bld, nir_alu_instr *alu)
    r = nir_isub(bld, a, r);
 
    r = nir_uge(bld, r, b);
-   r = nir_b2i(bld, r);
+   r = nir_b2i32(bld, r);
 
    q = nir_iadd(bld, q, r);
    if (is_signed)  {
diff --git a/src/compiler/nir/nir_lower_int64.c b/src/compiler/nir/nir_lower_int64.c
index 50acc858605..81669c02cc6 100644
--- a/src/compiler/nir/nir_lower_int64.c
+++ b/src/compiler/nir/nir_lower_int64.c
@@ -48,7 +48,7 @@ lower_isign64(nir_builder *b, nir_ssa_def *x)
 
    nir_ssa_def *is_non_zero = nir_i2b(b, nir_ior(b, x_lo, x_hi));
    nir_ssa_def *res_hi = nir_ishr(b, x_hi, nir_imm_int(b, 31));
-   nir_ssa_def *res_lo = nir_ior(b, res_hi, nir_b2i(b, is_non_zero));
+   nir_ssa_def *res_lo = nir_ior(b, res_hi, nir_b2i32(b, is_non_zero));
 
    return nir_pack_64_2x32_split(b, res_lo, res_hi);
 }
diff --git a/src/compiler/nir/nir_opcodes.py b/src/compiler/nir/nir_opcodes.py
index 8575a4f2859..2db55520582 100644
--- a/src/compiler/nir/nir_opcodes.py
+++ b/src/compiler/nir/nir_opcodes.py
@@ -93,6 +93,7 @@ class Opcode(object):
 # helper variables for strings
 tfloat = "float"
 tint = "int"
+tbool = "bool"
 tbool32 = "bool32"
 tuint = "uint"
 tuint16 = "uint16"
@@ -122,6 +123,8 @@ def type_sizes(type_):
         return [type_size(type_)]
     elif type_ == 'float':
         return [16, 32, 64]
+    elif type_ == 'bool':
+        return [32]
     else:
         return [8, 16, 32, 64]
 
@@ -207,17 +210,17 @@ def unsized_unop_convert(name, out_type, in_type, const_expr):
 
 unsized_unop_convert("i2f", tfloat, tint, "src0")
 unsized_unop_convert("i2i", tint, tint, "src0")
-unop_convert("i2b", tbool32, tint, "src0 != 0")
+unsized_unop_convert("i2b", tbool, tint, "src0 != 0")
 unsized_unop_convert("u2f", tfloat, tuint, "src0")
 unsized_unop_convert("u2u", tuint, tuint, "src0")
 unsized_unop_convert("f2i", tint, tfloat, "src0")
 unsized_unop_convert("f2u", tuint, tfloat, "src0")
-unop_convert("f2b", tbool32, tfloat, "src0 != 0.0")
+unsized_unop_convert("f2b", tbool, tfloat, "src0 != 0.0")
 unsized_unop_convert("f2f", tfloat, tfloat, "src0")
 unsized_unop_convert("f2f_rtne", tfloat, tfloat, "src0")
 unsized_unop_convert("f2f_rtz", tfloat, tfloat, "src0")
-unop_convert("b2f", tfloat, tbool32, "src0 ? 1.0 : 0.0")
-unop_convert("b2i", tint, tbool32, "src0 ? 1 : 0")
+unsized_unop_convert("b2f", tfloat, tbool, "src0 ? 1.0 : 0.0")
+unsized_unop_convert("b2i", tint, tbool, "src0 ? 1 : 0")
 
 
 # Unary floating-point rounding operations.
diff --git a/src/compiler/spirv/vtn_glsl450.c b/src/compiler/spirv/vtn_glsl450.c
index 06a49e48e3f..b54aeb9b217 100644
--- a/src/compiler/spirv/vtn_glsl450.c
+++ b/src/compiler/spirv/vtn_glsl450.c
@@ -274,7 +274,7 @@ build_atan(nir_builder *b, nir_ssa_def *y_over_x)
    /* range-reduction fixup */
    tmp = nir_fadd(b, tmp,
                   nir_fmul(b,
-                           nir_b2f(b, nir_flt(b, one, abs_y_over_x)),
+                           nir_b2f32(b, nir_flt(b, one, abs_y_over_x)),
                            nir_fadd(b, nir_fmul(b, tmp,
                                                 nir_imm_float(b, -2.0f)),
                                        nir_imm_float(b, M_PI_2f))));
@@ -346,7 +346,7 @@ build_atan2(nir_builder *b, nir_ssa_def *y, nir_ssa_def *x)
    /* Calculate the arctangent and fix up the result if we had flipped the
     * coordinate system.
     */
-   nir_ssa_def *arc = nir_fadd(b, nir_fmul(b, nir_b2f(b, flip),
+   nir_ssa_def *arc = nir_fadd(b, nir_fmul(b, nir_b2f32(b, flip),
                                            nir_imm_float(b, M_PI_2f)),
                                build_atan(b, tan));
 
diff --git a/src/intel/compiler/brw_fs_nir.cpp b/src/intel/compiler/brw_fs_nir.cpp
index 649b4dc545c..b71656170f1 100644
--- a/src/intel/compiler/brw_fs_nir.cpp
+++ b/src/intel/compiler/brw_fs_nir.cpp
@@ -780,7 +780,7 @@ fs_visitor::nir_emit_alu(const fs_builder &bld, nir_alu_instr *instr)
                   brw_imm_d(brw_rnd_mode_from_nir_op(instr->op)));
       }
 
-      if (nir_op_infos[instr->op].input_types[0] == nir_type_bool32) {
+      if (nir_op_infos[instr->op].input_types[0] == nir_type_bool) {
          op[0].type = BRW_REGISTER_TYPE_D;
          op[0].negate = !op[0].negate;
       }
diff --git a/src/intel/compiler/brw_vec4_nir.cpp b/src/intel/compiler/brw_vec4_nir.cpp
index 6799dff03bc..37b9115b20c 100644
--- a/src/intel/compiler/brw_vec4_nir.cpp
+++ b/src/intel/compiler/brw_vec4_nir.cpp
@@ -1163,7 +1163,7 @@ vec4_visitor::nir_emit_alu(nir_alu_instr *instr)
    case nir_op_f2u:
    case nir_op_b2i:
    case nir_op_b2f:
-      if (nir_op_infos[instr->op].input_types[0] == nir_type_bool32) {
+      if (nir_op_infos[instr->op].input_types[0] == nir_type_bool) {
          assert(op[0].type == BRW_REGISTER_TYPE_D);
          op[0].negate = true;
       }
diff --git a/src/mesa/program/prog_to_nir.c b/src/mesa/program/prog_to_nir.c
index 47103306ad4..ee7d7d8f6d2 100644
--- a/src/mesa/program/prog_to_nir.c
+++ b/src/mesa/program/prog_to_nir.c
@@ -393,7 +393,7 @@ static void
 ptn_slt(nir_builder *b, nir_alu_dest dest, nir_ssa_def **src)
 {
    if (b->shader->options->native_integers) {
-      ptn_move_dest(b, dest, nir_b2f(b, nir_flt(b, src[0], src[1])));
+      ptn_move_dest(b, dest, nir_b2f32(b, nir_flt(b, src[0], src[1])));
    } else {
       ptn_move_dest(b, dest, nir_slt(b, src[0], src[1]));
    }
@@ -406,7 +406,7 @@ static void
 ptn_sge(nir_builder *b, nir_alu_dest dest, nir_ssa_def **src)
 {
    if (b->shader->options->native_integers) {
-      ptn_move_dest(b, dest, nir_b2f(b, nir_fge(b, src[0], src[1])));
+      ptn_move_dest(b, dest, nir_b2f32(b, nir_fge(b, src[0], src[1])));
    } else {
       ptn_move_dest(b, dest, nir_sge(b, src[0], src[1]));
    }
-- 
2.19.1



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