[Mesa-dev] [PATCH 1/2] i965: Use a 'nir' temporary rather than poking at brw_program
Alejandro Piñeiro
apinheiro at igalia.com
Sat Nov 10 11:53:08 UTC 2018
Reviewed-by: Alejandro Piñeiro <apinheiro at igalia.com>
On 10/11/18 09:17, Kenneth Graunke wrote:
> It's shorter and will also be useful when I adjust cloning soon.
> ---
> src/mesa/drivers/dri/i965/brw_cs.c | 6 +++---
> src/mesa/drivers/dri/i965/brw_gs.c | 11 ++++++-----
> src/mesa/drivers/dri/i965/brw_tcs.c | 2 +-
> src/mesa/drivers/dri/i965/brw_tes.c | 2 +-
> src/mesa/drivers/dri/i965/brw_vs.c | 15 ++++++++-------
> src/mesa/drivers/dri/i965/brw_wm.c | 11 ++++++-----
> 6 files changed, 25 insertions(+), 22 deletions(-)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_cs.c b/src/mesa/drivers/dri/i965/brw_cs.c
> index 498c80d46a5..3ae54830f78 100644
> --- a/src/mesa/drivers/dri/i965/brw_cs.c
> +++ b/src/mesa/drivers/dri/i965/brw_cs.c
> @@ -58,6 +58,7 @@ brw_codegen_cs_prog(struct brw_context *brw,
> struct brw_cs_prog_data prog_data;
> bool start_busy = false;
> double start_time = 0;
> + nir_shader *nir = cp->program.nir;
>
> memset(&prog_data, 0, sizeof(prog_data));
>
> @@ -76,7 +77,7 @@ brw_codegen_cs_prog(struct brw_context *brw,
>
> assign_cs_binding_table_offsets(devinfo, &cp->program, &prog_data);
>
> - brw_nir_setup_glsl_uniforms(mem_ctx, cp->program.nir,
> + brw_nir_setup_glsl_uniforms(mem_ctx, nir,
> &cp->program, &prog_data.base, true);
>
> if (unlikely(brw->perf_debug)) {
> @@ -91,8 +92,7 @@ brw_codegen_cs_prog(struct brw_context *brw,
>
> char *error_str;
> program = brw_compile_cs(brw->screen->compiler, brw, mem_ctx, key,
> - &prog_data, cp->program.nir, st_index,
> - &error_str);
> + &prog_data, nir, st_index, &error_str);
> if (program == NULL) {
> cp->program.sh.data->LinkStatus = LINKING_FAILURE;
> ralloc_strcat(&cp->program.sh.data->InfoLog, error_str);
> diff --git a/src/mesa/drivers/dri/i965/brw_gs.c b/src/mesa/drivers/dri/i965/brw_gs.c
> index 7263f6351e9..55c2923bded 100644
> --- a/src/mesa/drivers/dri/i965/brw_gs.c
> +++ b/src/mesa/drivers/dri/i965/brw_gs.c
> @@ -89,15 +89,17 @@ brw_codegen_gs_prog(struct brw_context *brw,
>
> void *mem_ctx = ralloc_context(NULL);
>
> + nir_shader *nir = gp->program.nir;
> +
> assign_gs_binding_table_offsets(devinfo, &gp->program, &prog_data);
>
> - brw_nir_setup_glsl_uniforms(mem_ctx, gp->program.nir, &gp->program,
> + brw_nir_setup_glsl_uniforms(mem_ctx, nir, &gp->program,
> &prog_data.base.base,
> compiler->scalar_stage[MESA_SHADER_GEOMETRY]);
> - brw_nir_analyze_ubo_ranges(compiler, gp->program.nir, NULL,
> + brw_nir_analyze_ubo_ranges(compiler, nir, NULL,
> prog_data.base.base.ubo_ranges);
>
> - uint64_t outputs_written = gp->program.nir->info.outputs_written;
> + uint64_t outputs_written = nir->info.outputs_written;
>
> brw_compute_vue_map(devinfo,
> &prog_data.base.vue_map, outputs_written,
> @@ -115,8 +117,7 @@ brw_codegen_gs_prog(struct brw_context *brw,
> char *error_str;
> const unsigned *program =
> brw_compile_gs(brw->screen->compiler, brw, mem_ctx, key,
> - &prog_data, gp->program.nir, &gp->program,
> - st_index, &error_str);
> + &prog_data, nir, &gp->program, st_index, &error_str);
> if (program == NULL) {
> ralloc_strcat(&gp->program.sh.data->InfoLog, error_str);
> _mesa_problem(NULL, "Failed to compile geometry shader: %s\n", error_str);
> diff --git a/src/mesa/drivers/dri/i965/brw_tcs.c b/src/mesa/drivers/dri/i965/brw_tcs.c
> index 17f4130c095..6e60a44fc10 100644
> --- a/src/mesa/drivers/dri/i965/brw_tcs.c
> +++ b/src/mesa/drivers/dri/i965/brw_tcs.c
> @@ -100,7 +100,7 @@ brw_codegen_tcs_prog(struct brw_context *brw, struct brw_program *tcp,
> brw_nir_setup_glsl_uniforms(mem_ctx, nir, &tcp->program,
> &prog_data.base.base,
> compiler->scalar_stage[MESA_SHADER_TESS_CTRL]);
> - brw_nir_analyze_ubo_ranges(compiler, tcp->program.nir, NULL,
> + brw_nir_analyze_ubo_ranges(compiler, nir, NULL,
> prog_data.base.base.ubo_ranges);
> } else {
> /* Upload the Patch URB Header as the first two uniforms.
> diff --git a/src/mesa/drivers/dri/i965/brw_tes.c b/src/mesa/drivers/dri/i965/brw_tes.c
> index b3220a94741..8f8f68530b7 100644
> --- a/src/mesa/drivers/dri/i965/brw_tes.c
> +++ b/src/mesa/drivers/dri/i965/brw_tes.c
> @@ -85,7 +85,7 @@ brw_codegen_tes_prog(struct brw_context *brw,
> brw_nir_setup_glsl_uniforms(mem_ctx, nir, &tep->program,
> &prog_data.base.base,
> compiler->scalar_stage[MESA_SHADER_TESS_EVAL]);
> - brw_nir_analyze_ubo_ranges(compiler, tep->program.nir, NULL,
> + brw_nir_analyze_ubo_ranges(compiler, nir, NULL,
> prog_data.base.base.ubo_ranges);
>
> int st_index = -1;
> diff --git a/src/mesa/drivers/dri/i965/brw_vs.c b/src/mesa/drivers/dri/i965/brw_vs.c
> index 69c0046bbb9..d557e82f9fc 100644
> --- a/src/mesa/drivers/dri/i965/brw_vs.c
> +++ b/src/mesa/drivers/dri/i965/brw_vs.c
> @@ -174,26 +174,28 @@ brw_codegen_vs_prog(struct brw_context *brw,
>
> mem_ctx = ralloc_context(NULL);
>
> + nir_shader *nir = vp->program.nir;
> +
> brw_assign_common_binding_table_offsets(devinfo, &vp->program,
> &prog_data.base.base, 0);
>
> if (!vp->program.is_arb_asm) {
> - brw_nir_setup_glsl_uniforms(mem_ctx, vp->program.nir, &vp->program,
> + brw_nir_setup_glsl_uniforms(mem_ctx, nir, &vp->program,
> &prog_data.base.base,
> compiler->scalar_stage[MESA_SHADER_VERTEX]);
> - brw_nir_analyze_ubo_ranges(compiler, vp->program.nir, key,
> + brw_nir_analyze_ubo_ranges(compiler, nir, key,
> prog_data.base.base.ubo_ranges);
> } else {
> - brw_nir_setup_arb_uniforms(mem_ctx, vp->program.nir, &vp->program,
> + brw_nir_setup_arb_uniforms(mem_ctx, nir, &vp->program,
> &prog_data.base.base);
> }
>
> uint64_t outputs_written =
> - brw_vs_outputs_written(brw, key, vp->program.nir->info.outputs_written);
> + brw_vs_outputs_written(brw, key, nir->info.outputs_written);
>
> brw_compute_vue_map(devinfo,
> &prog_data.base.vue_map, outputs_written,
> - vp->program.nir->info.separate_shader);
> + nir->info.separate_shader);
>
> if (0) {
> _mesa_fprint_program_opt(stderr, &vp->program, PROG_PRINT_DEBUG, true);
> @@ -220,8 +222,7 @@ brw_codegen_vs_prog(struct brw_context *brw,
> */
> char *error_str;
> program = brw_compile_vs(compiler, brw, mem_ctx, key, &prog_data,
> - vp->program.nir,
> - st_index, &error_str);
> + nir, st_index, &error_str);
> if (program == NULL) {
> if (!vp->program.is_arb_asm) {
> vp->program.sh.data->LinkStatus = LINKING_FAILURE;
> diff --git a/src/mesa/drivers/dri/i965/brw_wm.c b/src/mesa/drivers/dri/i965/brw_wm.c
> index 139ca910f9f..1ed66ed55dc 100644
> --- a/src/mesa/drivers/dri/i965/brw_wm.c
> +++ b/src/mesa/drivers/dri/i965/brw_wm.c
> @@ -139,6 +139,8 @@ brw_codegen_wm_prog(struct brw_context *brw,
> bool start_busy = false;
> double start_time = 0;
>
> + nir_shader *nir = fp->program.nir;
> +
> memset(&prog_data, 0, sizeof(prog_data));
>
> /* Use ALT floating point mode for ARB programs so that 0^0 == 1. */
> @@ -148,13 +150,12 @@ brw_codegen_wm_prog(struct brw_context *brw,
> assign_fs_binding_table_offsets(devinfo, &fp->program, key, &prog_data);
>
> if (!fp->program.is_arb_asm) {
> - brw_nir_setup_glsl_uniforms(mem_ctx, fp->program.nir, &fp->program,
> + brw_nir_setup_glsl_uniforms(mem_ctx, nir, &fp->program,
> &prog_data.base, true);
> - brw_nir_analyze_ubo_ranges(brw->screen->compiler, fp->program.nir,
> + brw_nir_analyze_ubo_ranges(brw->screen->compiler, nir,
> NULL, prog_data.base.ubo_ranges);
> } else {
> - brw_nir_setup_arb_uniforms(mem_ctx, fp->program.nir, &fp->program,
> - &prog_data.base);
> + brw_nir_setup_arb_uniforms(mem_ctx, nir, &fp->program, &prog_data.base);
>
> if (unlikely(INTEL_DEBUG & DEBUG_WM))
> brw_dump_arb_asm("fragment", &fp->program);
> @@ -178,7 +179,7 @@ brw_codegen_wm_prog(struct brw_context *brw,
>
> char *error_str = NULL;
> program = brw_compile_fs(brw->screen->compiler, brw, mem_ctx,
> - key, &prog_data, fp->program.nir,
> + key, &prog_data, nir,
> &fp->program, st_index8, st_index16, st_index32,
> true, false, vue_map,
> &error_str);
More information about the mesa-dev
mailing list