[Mesa-dev] [PATCH 05/22] nir/spirv: cast shift operand to u32
Karol Herbst
kherbst at redhat.com
Tue Nov 13 21:26:09 UTC 2018
yeah... I planned to push the first two patches some time ago. Simply
forgot about those.
On Tue, Nov 13, 2018 at 10:13 PM Jason Ekstrand <jason at jlekstrand.net> wrote:
>
> Also, I don't see why this one and the first two can't land today. They're obvious clean-ups.
>
> On Tue, Nov 13, 2018 at 3:11 PM Jason Ekstrand <jason at jlekstrand.net> wrote:
>>
>> Reviewed-by: Jason Ekstrand <jason at jlekstrand.net>
>> Cc: mesa-stable at lists.freedesktop.org
>>
>> On Tue, Nov 13, 2018 at 9:48 AM Karol Herbst <kherbst at redhat.com> wrote:
>>>
>>> v2: fix for specialization constants as well
>>>
>>> Signed-off-by: Karol Herbst <kherbst at redhat.com>
>>> ---
>>> src/compiler/spirv/spirv_to_nir.c | 20 ++++++++++++++++++++
>>> src/compiler/spirv/vtn_alu.c | 11 +++++++++++
>>> 2 files changed, 31 insertions(+)
>>>
>>> diff --git a/src/compiler/spirv/spirv_to_nir.c b/src/compiler/spirv/spirv_to_nir.c
>>> index d72f07dc1f9..2c214324774 100644
>>> --- a/src/compiler/spirv/spirv_to_nir.c
>>> +++ b/src/compiler/spirv/spirv_to_nir.c
>>> @@ -1813,6 +1813,26 @@ vtn_handle_constant(struct vtn_builder *b, SpvOp opcode,
>>> src[j] = src_val->constant->values[0];
>>> }
>>>
>>> + /* fix up fixed size sources */
>>> + switch (op) {
>>> + case nir_op_ishl:
>>> + case nir_op_ishr:
>>> + case nir_op_ushr: {
>>> + if (bit_size == 32)
>>> + break;
>>> + for (unsigned i = 0; i < num_components; ++i) {
>>> + switch (bit_size) {
>>> + case 64: src[1].u32[i] = src[1].u64[i]; break;
>>> + case 16: src[1].u32[i] = src[1].u16[i]; break;
>>> + case 8: src[1].u32[i] = src[1].u8[i]; break;
>>> + }
>>> + }
>>> + break;
>>> + }
>>> + default:
>>> + break;
>>> + }
>>> +
>>> val->constant->values[0] =
>>> nir_eval_const_opcode(op, num_components, bit_size, src);
>>> break;
>>> diff --git a/src/compiler/spirv/vtn_alu.c b/src/compiler/spirv/vtn_alu.c
>>> index ea25d4bcbdc..32825da29cb 100644
>>> --- a/src/compiler/spirv/vtn_alu.c
>>> +++ b/src/compiler/spirv/vtn_alu.c
>>> @@ -743,6 +743,17 @@ vtn_handle_alu(struct vtn_builder *b, SpvOp opcode,
>>> src[1] = tmp;
>>> }
>>>
>>> + switch (op) {
>>> + case nir_op_ishl:
>>> + case nir_op_ishr:
>>> + case nir_op_ushr:
>>> + if (src[1]->bit_size != 32)
>>> + src[1] = nir_u2u32(&b->nb, src[1]);
>>> + break;
>>> + default:
>>> + break;
>>> + }
>>> +
>>> val->ssa->def = nir_build_alu(&b->nb, op, src[0], src[1], src[2], src[3]);
>>> break;
>>> } /* default */
>>> --
>>> 2.19.1
>>>
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>>> mesa-dev at lists.freedesktop.org
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