[Mesa-dev] [PATCH 5/5] anv/icl: Set use full ways in L3CNTLREG

[Anuj Phogat]

L3 allocation table in h/w specification recommends using 4 KB
granularity for programming allocation fields in L3CNTLREG.

Signed-off-by: Anuj Phogat <anuj.phogat at gmail.com>
Cc: Kenneth Graunke <kenneth at whitecape.org>
Cc: Francisco Jerez <currojerez at riseup.net>
Cc: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
---
 src/intel/genxml/gen11.xml         | 1 +
 src/intel/vulkan/genX_cmd_buffer.c | 1 +
 2 files changed, 2 insertions(+)

diff --git a/src/intel/genxml/gen11.xml b/src/intel/genxml/gen11.xml
index b975fe94776..1239ed011ed 100644
--- a/src/intel/genxml/gen11.xml
+++ b/src/intel/genxml/gen11.xml
@@ -3547,6 +3547,7 @@
     <field name="SLM Enable" start="0" end="0" type="uint"/>
     <field name="URB Allocation" start="1" end="7" type="uint"/>
     <field name="Error Detection Behavior Control" start="9" end="9" type="bool"/>
+    <field name="Use Full Ways" start="10" end="10" type="bool"/>
     <field name="RO Allocation" start="11" end="17" type="uint"/>
     <field name="DC Allocation" start="18" end="24" type="uint"/>
     <field name="All Allocation" start="25" end="31" type="uint"/>
diff --git a/src/intel/vulkan/genX_cmd_buffer.c b/src/intel/vulkan/genX_cmd_buffer.c
index ed88157170d..c7e5ef9596e 100644
--- a/src/intel/vulkan/genX_cmd_buffer.c
+++ b/src/intel/vulkan/genX_cmd_buffer.c
@@ -1623,6 +1623,7 @@ genX(cmd_buffer_config_l3)(struct anv_cmd_buffer *cmd_buffer,
     * desirable behavior.
    */
                    .ErrorDetectionBehaviorControl = true,
+                   .UseFullWays = true,
 #endif
                    .URBAllocation = cfg->n[GEN_L3P_URB],
                    .ROAllocation = cfg->n[GEN_L3P_RO],
-- 
2.17.1