[Mesa-dev] [PATCH 1/5] anv/pipeline: Move wpos and input attachment lowering to lower_nir

Lionel Landwerlin lionel.g.landwerlin at intel.com
Thu Nov 22 16:12:28 UTC 2018


On 13/10/2018 01:08, Jason Ekstrand wrote:
> This lets us make anv_pipeline_compile_to_nir take a device instead of a
> pipeline.


Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin at intel.com>


> ---
>   src/intel/vulkan/anv_pipeline.c | 19 ++++++++-----------
>   1 file changed, 8 insertions(+), 11 deletions(-)
>
> diff --git a/src/intel/vulkan/anv_pipeline.c b/src/intel/vulkan/anv_pipeline.c
> index be05c11f45d..4e3ae9d094d 100644
> --- a/src/intel/vulkan/anv_pipeline.c
> +++ b/src/intel/vulkan/anv_pipeline.c
> @@ -97,15 +97,13 @@ static const uint64_t stage_to_debug[] = {
>    * we can't do that yet because we don't have the ability to copy nir.
>    */
>   static nir_shader *
> -anv_shader_compile_to_nir(struct anv_pipeline *pipeline,
> +anv_shader_compile_to_nir(struct anv_device *device,
>                             void *mem_ctx,
>                             const struct anv_shader_module *module,
>                             const char *entrypoint_name,
>                             gl_shader_stage stage,
>                             const VkSpecializationInfo *spec_info)
>   {
> -   const struct anv_device *device = pipeline->device;
> -
>      const struct brw_compiler *compiler =
>         device->instance->physicalDevice.compiler;
>      const nir_shader_compiler_options *nir_options =
> @@ -209,9 +207,6 @@ anv_shader_compile_to_nir(struct anv_pipeline *pipeline,
>      NIR_PASS_V(nir, nir_remove_dead_variables,
>                 nir_var_shader_in | nir_var_shader_out | nir_var_system_value);
>   
> -   if (stage == MESA_SHADER_FRAGMENT)
> -      NIR_PASS_V(nir, nir_lower_wpos_center, pipeline->sample_shading_enable);
> -
>      NIR_PASS_V(nir, nir_propagate_invariant);
>      NIR_PASS_V(nir, nir_lower_io_to_temporaries,
>                 entry_point->impl, true, false);
> @@ -221,9 +216,6 @@ anv_shader_compile_to_nir(struct anv_pipeline *pipeline,
>   
>      nir = brw_preprocess_nir(compiler, nir);
>   
> -   if (stage == MESA_SHADER_FRAGMENT)
> -      NIR_PASS_V(nir, anv_nir_lower_input_attachments);
> -
>      return nir;
>   }
>   
> @@ -484,6 +476,11 @@ anv_pipeline_lower_nir(struct anv_pipeline *pipeline,
>      struct brw_stage_prog_data *prog_data = &stage->prog_data.base;
>      nir_shader *nir = stage->nir;
>   
> +   if (nir->info.stage == MESA_SHADER_FRAGMENT) {
> +      NIR_PASS_V(nir, nir_lower_wpos_center, pipeline->sample_shading_enable);
> +      NIR_PASS_V(nir, anv_nir_lower_input_attachments);
> +   }
> +
>      NIR_PASS_V(nir, anv_nir_lower_ycbcr_textures, layout);
>   
>      NIR_PASS_V(nir, anv_nir_lower_push_constants);
> @@ -969,7 +966,7 @@ anv_pipeline_compile_graphics(struct anv_pipeline *pipeline,
>            .sampler_to_descriptor = stages[s].sampler_to_descriptor
>         };
>   
> -      stages[s].nir = anv_shader_compile_to_nir(pipeline, pipeline_ctx,
> +      stages[s].nir = anv_shader_compile_to_nir(pipeline->device, pipeline_ctx,
>                                                   stages[s].module,
>                                                   stages[s].entrypoint,
>                                                   stages[s].stage,
> @@ -1137,7 +1134,7 @@ anv_pipeline_compile_cs(struct anv_pipeline *pipeline,
>   
>         void *mem_ctx = ralloc_context(NULL);
>   
> -      stage.nir = anv_shader_compile_to_nir(pipeline, mem_ctx,
> +      stage.nir = anv_shader_compile_to_nir(pipeline->device, mem_ctx,
>                                               stage.module,
>                                               stage.entrypoint,
>                                               stage.stage,




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