[Mesa-dev] [PATCH 1/2] nv50/ir: don't optimize dnz muls to add

Karol Herbst kherbst at redhat.com
Sun Nov 25 02:01:59 UTC 2018


yeah, I was hitting some asserts with a d3d trace. The issue is that
we optimize some MADs/MULs with dnz set to ADD, but the emiter isn't
able to emit an ADD with the dnz flag. At least for gm107.

example TGSI triggering it (there are more cases though):
VERT
PROPERTY NEXT_SHADER FRAG
PROPERTY MUL_ZERO_WINS 1
DCL IN[0]
DCL IN[1]
DCL IN[2]
DCL OUT[0], POSITION
DCL OUT[1], COLOR
DCL OUT[2].xy, TEXCOORD[0]
DCL CONST[0][0..240]
DCL TEMP[0]
IMM[0] FLT32 {    1.0000,     0.0000,     0.0000,     0.0000}
 0: MUL TEMP[0], CONST[0][1], IN[0].yyyy
 1: MAD TEMP[0], IN[0].xxxx, CONST[0][0], TEMP[0]
 2: MAD TEMP[0], IN[0].zzzz, CONST[0][2], TEMP[0]
 3: MAD TEMP[0], IN[0].wwww, CONST[0][3], TEMP[0]
 4: ADD OUT[0], TEMP[0], CONST[0][240]
 5: MUL OUT[1], CONST[0][4], IN[1]
 6: MAD TEMP[0].xyz, IN[2].xyxw, IMM[0].xxyy, IMM[0].yyxy
 7: DP3 OUT[2].x, TEMP[0], CONST[0][16].xyww
 8: DP3 OUT[2].y, TEMP[0], CONST[0][17].xyww
 9: END
On Sun, Nov 25, 2018 at 2:12 AM Ilia Mirkin <imirkin at alum.mit.edu> wrote:
>
> Can you elaborate as to what the issue is? The dnz flag is set when we
> want to make NaN -> Infinity. Do you have a concrete TGSI program that
> triggers issues?
> On Sat, Nov 24, 2018 at 6:04 PM Karol Herbst <kherbst at redhat.com> wrote:
> >
> > fixes asserts with gallium nine
> >
> > Signed-off-by: Karol Herbst <kherbst at redhat.com>
> > ---
> >  src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp | 6 ++++--
> >  1 file changed, 4 insertions(+), 2 deletions(-)
> >
> > diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
> > index 04d26dcbf53..0a284572ede 100644
> > --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
> > +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
> > @@ -557,6 +557,8 @@ ConstantFolding::expr(Instruction *i,
> >     case OP_MAD:
> >     case OP_FMA:
> >     case OP_MUL:
> > +      if (i->dnz && i->op != OP_MUL)
> > +         return;
> >        if (i->dnz && i->dType == TYPE_F32) {
> >           if (!isfinite(a->data.f32))
> >              a->data.f32 = 0.0f;
> > @@ -1089,7 +1091,7 @@ ConstantFolding::opnd(Instruction *i, ImmediateValue &imm0, int s)
> >              i->src(0).mod = 0;
> >           i->setSrc(1, NULL);
> >        } else
> > -      if (!i->postFactor && (imm0.isInteger(2) || imm0.isInteger(-2))) {
> > +      if (!i->postFactor && !i->dnz && (imm0.isInteger(2) || imm0.isInteger(-2))) {
> >           if (imm0.isNegative())
> >              i->src(t).mod = i->src(t).mod ^ Modifier(NV50_IR_MOD_NEG);
> >           i->op = OP_ADD;
> > @@ -1120,7 +1122,7 @@ ConstantFolding::opnd(Instruction *i, ImmediateValue &imm0, int s)
> >           if (i->op != OP_CVT)
> >              i->src(0).mod = 0;
> >        } else
> > -      if (i->subOp != NV50_IR_SUBOP_MUL_HIGH &&
> > +      if (i->subOp != NV50_IR_SUBOP_MUL_HIGH && !i->dnz &&
> >            (imm0.isInteger(1) || imm0.isInteger(-1))) {
> >           if (imm0.isNegative())
> >              i->src(t).mod = i->src(t).mod ^ Modifier(NV50_IR_MOD_NEG);
> > --
> > 2.19.1
> >
> > _______________________________________________
> > mesa-dev mailing list
> > mesa-dev at lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/mesa-dev


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