[Mesa-dev] [PATCH] intel/compiler: Flag surface reads as having side-effects

[Jason Ekstrand]

On Mon, Nov 26, 2018 at 2:08 PM Francisco Jerez <currojerez at riseup.net>
wrote:

> Jason Ekstrand <jason at jlekstrand.net> writes:
>
> > ---
> >  src/intel/compiler/brw_shader.cpp | 12 ++++++++++++
> >  1 file changed, 12 insertions(+)
> >
> > diff --git a/src/intel/compiler/brw_shader.cpp
> b/src/intel/compiler/brw_shader.cpp
> > index 34b8f3acf93..5cb91e0dce9 100644
> > --- a/src/intel/compiler/brw_shader.cpp
> > +++ b/src/intel/compiler/brw_shader.cpp
> > @@ -1007,6 +1007,18 @@ backend_instruction::has_side_effects() const
> >     case SHADER_OPCODE_SEND:
> >        return send_has_side_effects;
> >
> > +   case SHADER_OPCODE_TYPED_SURFACE_READ:
> > +   case SHADER_OPCODE_TYPED_SURFACE_READ_LOGICAL:
> > +   case SHADER_OPCODE_UNTYPED_SURFACE_READ:
> > +   case SHADER_OPCODE_UNTYPED_SURFACE_READ_LOGICAL:
> > +   case SHADER_OPCODE_BYTE_SCATTERED_READ:
> > +   case SHADER_OPCODE_BYTE_SCATTERED_READ_LOGICAL:
> > +      /* The back-end compilers don't know how to properly re-order
> reads with
> > +       * respect to writes.  In order to prevent accidental re-ordering
> and
> > +       * CSE, flag them as having side-effects.
> > +       */
> > +      return true;
> > +
>
> Why would that be necessary?  Don't surface writes and atomics act as a
> scheduling barrier?
>

Yes, they do.  Looking a bit more, I just found is_volatile() which is
actually what I want.  It does, indeed, return true for these but not for
the new SEND opcode I added.  That explains why things haven't exploded
before.  Thanks!  I'll fix the send opcode.  Feel free to disregard this
patch.

--Jason


> >     case SHADER_OPCODE_UNTYPED_ATOMIC:
> >     case SHADER_OPCODE_UNTYPED_ATOMIC_LOGICAL:
> >     case SHADER_OPCODE_UNTYPED_ATOMIC_FLOAT:
> > --
> > 2.19.1
> >
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> > mesa-dev at lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/mesa-dev
>
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