[Mesa-dev] [PATCH] intel/compiler: fix register allocation in opt_peephole_sel
Iago Toral Quiroga
itoral at igalia.com
Tue Nov 27 09:24:41 UTC 2018
This wasn't handling 64-bit cases properly. Found by inspection.
---
src/intel/compiler/brw_fs_sel_peephole.cpp | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/src/intel/compiler/brw_fs_sel_peephole.cpp b/src/intel/compiler/brw_fs_sel_peephole.cpp
index 4d11d10cc6..98d640a3bf 100644
--- a/src/intel/compiler/brw_fs_sel_peephole.cpp
+++ b/src/intel/compiler/brw_fs_sel_peephole.cpp
@@ -198,8 +198,7 @@ fs_visitor::opt_peephole_sel()
*/
fs_reg src0(then_mov[i]->src[0]);
if (src0.file == IMM) {
- src0 = vgrf(glsl_type::float_type);
- src0.type = then_mov[i]->src[0].type;
+ src0 = ibld.vgrf(then_mov[i]->src[0].type);
ibld.MOV(src0, then_mov[i]->src[0]);
}
--
2.17.1
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