[Mesa-dev] [PATCH 3/3] winsys/amdgpu: use optimal VM alignment for CPU allocations

[Christian König]

Am 27.11.18 um 00:02 schrieb Marek Olšák:
> From: Marek Olšák <marek.olsak at amd.com>
>
> ---
>   src/gallium/winsys/amdgpu/drm/amdgpu_bo.c | 6 ++++--
>   1 file changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_bo.c b/src/gallium/winsys/amdgpu/drm/amdgpu_bo.c
> index 7b239695872..a9170a2bc69 100644
> --- a/src/gallium/winsys/amdgpu/drm/amdgpu_bo.c
> +++ b/src/gallium/winsys/amdgpu/drm/amdgpu_bo.c
> @@ -1541,22 +1541,24 @@ static struct pb_buffer *amdgpu_bo_from_ptr(struct radeon_winsys *rws,
>   
>       bo = CALLOC_STRUCT(amdgpu_winsys_bo);
>       if (!bo)
>           return NULL;
>   
>       if (amdgpu_create_bo_from_user_mem(ws->dev, pointer,
>                                          aligned_size, &buf_handle))
>           goto error;
>   
>       if (amdgpu_va_range_alloc(ws->dev, amdgpu_gpu_va_range_general,
> -                              aligned_size, 1 << 12, 0, &va, &va_handle,
> -			      AMDGPU_VA_RANGE_HIGH))
> +                              aligned_size,
> +                              amdgpu_get_optimal_vm_alignment(ws, aligned_size,
> +                                                              ws->info.gart_page_size),
> +                              0, &va, &va_handle, AMDGPU_VA_RANGE_HIGH))

For userptrs the VA alignment is most likely irrelevant because they are 
composed out of 4k pages anyway. On the other hand it shouldn't hurt to 
handle them the same way.

Feel free to add an Acked-by: Christian König <christian.koenig at amd.com> 
to the series.

Christian.

>           goto error_va_alloc;
>   
>       if (amdgpu_bo_va_op(buf_handle, 0, aligned_size, va, 0, AMDGPU_VA_OP_MAP))
>           goto error_va_map;
>   
>       /* Initialize it. */
>       pipe_reference_init(&bo->base.reference, 1);
>       bo->bo = buf_handle;
>       bo->base.alignment = 0;
>       bo->base.size = size;