[Mesa-dev] [PATCH v2 06/32] intel/isl: Expose isl_tiling_get_info
Jason Ekstrand
jason at jlekstrand.net
Fri Oct 12 18:46:36 UTC 2018
While we're moving things around, we also add dim and sample count
parameters. They are not used yet but the layout of Yf and Ys tiles are
dependent on these parameters.
Reviewed-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
---
src/intel/blorp/blorp_blit.c | 5 +++--
src/intel/isl/isl.c | 21 ++++++++++++++-------
src/intel/isl/isl.h | 15 +++++++++++++--
src/mesa/drivers/dri/i965/intel_blit.c | 5 +++--
4 files changed, 33 insertions(+), 13 deletions(-)
diff --git a/src/intel/blorp/blorp_blit.c b/src/intel/blorp/blorp_blit.c
index 8b8f76dec06..0ba08d95555 100644
--- a/src/intel/blorp/blorp_blit.c
+++ b/src/intel/blorp/blorp_blit.c
@@ -2109,8 +2109,9 @@ shrink_surface_params(const struct isl_device *dev,
x_offset_sa = (uint32_t)*x0 * px_size_sa.w + info->tile_x_sa;
y_offset_sa = (uint32_t)*y0 * px_size_sa.h + info->tile_y_sa;
uint32_t tile_z_sa, tile_a;
- isl_tiling_get_intratile_offset_sa(info->surf.tiling,
- info->surf.format, info->surf.row_pitch_B,
+ isl_tiling_get_intratile_offset_sa(info->surf.tiling, info->surf.dim,
+ info->surf.format, info->surf.samples,
+ info->surf.row_pitch_B,
info->surf.array_pitch_el_rows,
x_offset_sa, y_offset_sa, 0, 0,
&byte_offset,
diff --git a/src/intel/isl/isl.c b/src/intel/isl/isl.c
index a805facb1ae..d6beee987b5 100644
--- a/src/intel/isl/isl.c
+++ b/src/intel/isl/isl.c
@@ -158,9 +158,11 @@ isl_device_get_sample_counts(struct isl_device *dev)
/**
* @param[out] info is written only on success
*/
-static void
+void
isl_tiling_get_info(enum isl_tiling tiling,
+ enum isl_surf_dim dim,
uint32_t format_bpb,
+ uint32_t samples,
struct isl_tile_info *tile_info)
{
const uint32_t bs = format_bpb / 8;
@@ -175,7 +177,7 @@ isl_tiling_get_info(enum isl_tiling tiling,
*/
assert(tiling == ISL_TILING_X || tiling == ISL_TILING_Y0);
assert(bs % 3 == 0 && isl_is_pow2(format_bpb / 3));
- isl_tiling_get_info(tiling, format_bpb / 3, tile_info);
+ isl_tiling_get_info(tiling, dim, format_bpb / 3, samples, tile_info);
return;
}
@@ -1432,7 +1434,7 @@ isl_surf_init_s(const struct isl_device *dev,
return false;
struct isl_tile_info tile_info;
- isl_tiling_get_info(tiling, fmtl->bpb, &tile_info);
+ isl_tiling_get_info(tiling, info->dim, fmtl->bpb, info->samples, &tile_info);
const enum isl_dim_layout dim_layout =
isl_surf_choose_dim_layout(dev, info->dim, tiling, info->usage);
@@ -1591,7 +1593,8 @@ isl_surf_get_tile_info(const struct isl_surf *surf,
struct isl_tile_info *tile_info)
{
const struct isl_format_layout *fmtl = isl_format_get_layout(surf->format);
- isl_tiling_get_info(surf->tiling, fmtl->bpb, tile_info);
+ isl_tiling_get_info(surf->tiling, surf->dim, fmtl->bpb,
+ surf->samples, tile_info);
}
bool
@@ -2042,7 +2045,7 @@ get_image_offset_sa_gen6_stencil_hiz(const struct isl_surf *surf,
isl_surf_get_image_alignment_sa(surf);
struct isl_tile_info tile_info;
- isl_tiling_get_info(surf->tiling, fmtl->bpb, &tile_info);
+ isl_surf_get_tile_info(surf, &tile_info);
const struct isl_extent2d tile_extent_sa = {
.w = tile_info.logical_extent_el.w * fmtl->bw,
.h = tile_info.logical_extent_el.h * fmtl->bh,
@@ -2258,7 +2261,8 @@ isl_surf_get_image_offset_B_tile_el(const struct isl_surf *surf,
&total_array_offset);
uint32_t z_offset_el, array_offset;
- isl_tiling_get_intratile_offset_el(surf->tiling, fmtl->bpb,
+ isl_tiling_get_intratile_offset_el(surf->tiling, surf->dim,
+ fmtl->bpb, surf->samples,
surf->row_pitch_B,
surf->array_pitch_el_rows,
total_x_offset_el,
@@ -2317,7 +2321,9 @@ isl_surf_get_image_surf(const struct isl_device *dev,
void
isl_tiling_get_intratile_offset_el(enum isl_tiling tiling,
+ enum isl_surf_dim dim,
uint32_t bpb,
+ uint32_t samples,
uint32_t row_pitch_B,
uint32_t array_pitch_el_rows,
uint32_t total_x_offset_el,
@@ -2332,6 +2338,7 @@ isl_tiling_get_intratile_offset_el(enum isl_tiling tiling,
{
if (tiling == ISL_TILING_LINEAR) {
assert(bpb % 8 == 0);
+ assert(samples == 1);
assert(total_z_offset_el == 0 && total_array_offset == 0);
*base_address_offset = total_y_offset_el * row_pitch_B +
total_x_offset_el * (bpb / 8);
@@ -2343,7 +2350,7 @@ isl_tiling_get_intratile_offset_el(enum isl_tiling tiling,
}
struct isl_tile_info tile_info;
- isl_tiling_get_info(tiling, bpb, &tile_info);
+ isl_tiling_get_info(tiling, dim, bpb, samples, &tile_info);
/* Pitches must make sense with the tiling */
assert(row_pitch_B % tile_info.phys_extent_B.width == 0);
diff --git a/src/intel/isl/isl.h b/src/intel/isl/isl.h
index 474d1d543c9..4f8d38e22fb 100644
--- a/src/intel/isl/isl.h
+++ b/src/intel/isl/isl.h
@@ -1618,6 +1618,13 @@ isl_tiling_is_std_y(enum isl_tiling tiling)
return (1u << tiling) & ISL_TILING_STD_Y_MASK;
}
+void
+isl_tiling_get_info(enum isl_tiling tiling,
+ enum isl_surf_dim dim,
+ uint32_t format_bpb,
+ uint32_t samples,
+ struct isl_tile_info *tile_info);
+
uint32_t
isl_tiling_to_i915_tiling(enum isl_tiling tiling);
@@ -2042,7 +2049,9 @@ isl_surf_get_image_surf(const struct isl_device *dev,
*/
void
isl_tiling_get_intratile_offset_el(enum isl_tiling tiling,
+ enum isl_surf_dim dim,
uint32_t bpb,
+ uint32_t samples,
uint32_t row_pitch_B,
uint32_t array_pitch_el_rows,
uint32_t total_x_offset_el,
@@ -2057,7 +2066,9 @@ isl_tiling_get_intratile_offset_el(enum isl_tiling tiling,
static inline void
isl_tiling_get_intratile_offset_sa(enum isl_tiling tiling,
+ enum isl_surf_dim dim,
enum isl_format format,
+ uint32_t samples,
uint32_t row_pitch_B,
uint32_t array_pitch_el_rows,
uint32_t total_x_offset_sa,
@@ -2082,8 +2093,8 @@ isl_tiling_get_intratile_offset_sa(enum isl_tiling tiling,
const uint32_t total_y_offset_el = total_y_offset_sa / fmtl->bh;
const uint32_t total_z_offset_el = total_z_offset_sa / fmtl->bd;
- isl_tiling_get_intratile_offset_el(tiling, fmtl->bpb, row_pitch_B,
- array_pitch_el_rows,
+ isl_tiling_get_intratile_offset_el(tiling, dim, fmtl->bpb, samples,
+ row_pitch_B, array_pitch_el_rows,
total_x_offset_el,
total_y_offset_el,
total_z_offset_el,
diff --git a/src/mesa/drivers/dri/i965/intel_blit.c b/src/mesa/drivers/dri/i965/intel_blit.c
index 1d5fe009d86..db7ffc004fd 100644
--- a/src/mesa/drivers/dri/i965/intel_blit.c
+++ b/src/mesa/drivers/dri/i965/intel_blit.c
@@ -169,8 +169,9 @@ get_blit_intratile_offset_el(const struct brw_context *brw,
uint32_t *y_offset_el)
{
uint32_t z_offset_el, array_offset;
- isl_tiling_get_intratile_offset_el(mt->surf.tiling,
- mt->cpp * 8, mt->surf.row_pitch_B,
+ isl_tiling_get_intratile_offset_el(mt->surf.tiling, mt->surf.dim,
+ mt->cpp * 8, mt->surf.samples,
+ mt->surf.row_pitch_B,
mt->surf.array_pitch_el_rows,
total_x_offset_el, total_y_offset_el,
0, 0,
--
2.19.1
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