[Mesa-dev] [PATCH v2 25/32] intel/isl: Add a max_miptail_levels field to isl_tile_info
Jason Ekstrand
jason at jlekstrand.net
Fri Oct 12 18:46:55 UTC 2018
---
src/intel/isl/isl.c | 5 +++++
src/intel/isl/isl.h | 7 +++++++
2 files changed, 12 insertions(+)
diff --git a/src/intel/isl/isl.c b/src/intel/isl/isl.c
index 4a8380ad540..3657b11ee00 100644
--- a/src/intel/isl/isl.c
+++ b/src/intel/isl/isl.c
@@ -181,6 +181,7 @@ isl_tiling_get_info(enum isl_tiling tiling,
return;
}
+ uint32_t max_miptail_levels = 0;
switch (tiling) {
case ISL_TILING_LINEAR:
assert(bs > 0);
@@ -239,6 +240,7 @@ isl_tiling_get_info(enum isl_tiling tiling,
.d = 1,
.a = 1,
};
+ max_miptail_levels = is_Ys ? 16 : 12;
break;
case ISL_SURF_DIM_2D:
@@ -262,6 +264,7 @@ isl_tiling_get_info(enum isl_tiling tiling,
logical_el.h >>= (ffs(samples) - 1) / 2;
logical_el.a = samples;
}
+ max_miptail_levels = is_Ys ? 16 - ffs(samples) : 11;
break;
case ISL_SURF_DIM_3D:
@@ -279,6 +282,7 @@ isl_tiling_get_info(enum isl_tiling tiling,
.d = 1 << (4 - ((ffs(format_bpb) - 3) / 3) + (1 * is_Ys)),
.a = 1,
};
+ max_miptail_levels = is_Ys ? 16 : 12;
break;
}
@@ -331,6 +335,7 @@ isl_tiling_get_info(enum isl_tiling tiling,
.format_bpb = format_bpb,
.logical_extent_el = logical_el,
.phys_extent_B = phys_B,
+ .max_miptail_levels = max_miptail_levels,
};
}
diff --git a/src/intel/isl/isl.h b/src/intel/isl/isl.h
index 4fb212e33d5..0bcb7edc899 100644
--- a/src/intel/isl/isl.h
+++ b/src/intel/isl/isl.h
@@ -1085,6 +1085,13 @@ struct isl_tile_info {
*/
struct isl_extent4d logical_extent_el;
+ /** The maximum number of miplevels that will fit in the miptail.
+ *
+ * This does not guarantee that the given number of miplevels will fit in
+ * the miptail as that is also dependent on the size of the miplevels.
+ */
+ uint32_t max_miptail_levels;
+
/** The physical size of the tile in bytes and rows of bytes
*
* This field determines how the tiles of a surface are physically layed
--
2.19.1
More information about the mesa-dev
mailing list