[Mesa-dev] [PATCH 3/7] nir/int64: Wire up lowering functions

[Matt Turner]

FINISHME: Figure out what to do about lowering mov operations. Currently
if we attempt to lower them in NIR we get stuck in an infinite loop. The
last patch of this series lowers them in the backend instead, but I'm
certainly open to ideas.
---
 src/compiler/nir/nir.h             |  9 +++-
 src/compiler/nir/nir_lower_int64.c | 93 ++++++++++++++++++++++++++++++++++++--
 2 files changed, 98 insertions(+), 4 deletions(-)

diff --git a/src/compiler/nir/nir.h b/src/compiler/nir/nir.h
index 9527079a9ef..12cbd030e21 100644
--- a/src/compiler/nir/nir.h
+++ b/src/compiler/nir/nir.h
@@ -2993,7 +2993,14 @@ typedef enum {
    nir_lower_imul64 = (1 << 0),
    nir_lower_isign64 = (1 << 1),
    /** Lower all int64 modulus and division opcodes */
-   nir_lower_divmod64 = (1 << 2),
+   nir_lower_divmod64  = (1 << 2),
+   nir_lower_bcsel64   = (1 << 3),
+   nir_lower_icmp64    = (1 << 4),
+   nir_lower_iadd64    = (1 << 5),
+   nir_lower_iabs64    = (1 << 6),
+   nir_lower_ineg64    = (1 << 7),
+   nir_lower_logic64   = (1 << 8),
+   nir_lower_minmax64  = (1 << 9),
 } nir_lower_int64_options;
 
 bool nir_lower_int64(nir_shader *shader, nir_lower_int64_options options);
diff --git a/src/compiler/nir/nir_lower_int64.c b/src/compiler/nir/nir_lower_int64.c
index 6b269830801..9cdc8a9d592 100644
--- a/src/compiler/nir/nir_lower_int64.c
+++ b/src/compiler/nir/nir_lower_int64.c
@@ -403,6 +403,33 @@ opcode_to_options_mask(nir_op opcode)
    case nir_op_imod:
    case nir_op_irem:
       return nir_lower_divmod64;
+   // FINISHME: case nir_op_imov: 
+   case nir_op_bcsel:
+      return nir_lower_bcsel64;
+   case nir_op_ieq:
+   case nir_op_ine:
+   case nir_op_ult:
+   case nir_op_ilt:
+   case nir_op_uge:
+   case nir_op_ige:
+      return nir_lower_icmp64;
+   case nir_op_iadd:
+   case nir_op_isub:
+      return nir_lower_iadd64;
+   case nir_op_imin:
+   case nir_op_imax:
+   case nir_op_umin:
+   case nir_op_umax:
+      return nir_lower_minmax64;
+   case nir_op_iabs:
+      return nir_lower_iabs64;
+   case nir_op_ineg:
+      return nir_lower_ineg64;
+   case nir_op_iand:
+   case nir_op_ior:
+   case nir_op_ixor:
+   case nir_op_inot:
+      return nir_lower_logic64;
    default:
       return 0;
    }
@@ -430,6 +457,41 @@ lower_int64_alu_instr(nir_builder *b, nir_alu_instr *alu)
       return lower_imod64(b, src[0], src[1]);
    case nir_op_irem:
       return lower_irem64(b, src[0], src[1]);
+   case nir_op_imov:
+      return lower_imov64(b, src[0]);
+   case nir_op_bcsel:
+      return lower_bcsel64(b, src[0], src[1], src[2]);
+   case nir_op_ieq:
+   case nir_op_ine:
+   case nir_op_ult:
+   case nir_op_ilt:
+   case nir_op_uge:
+   case nir_op_ige:
+      return lower_int64_compare(b, alu->op, src[0], src[1]);
+   case nir_op_iadd:
+      return lower_iadd64(b, src[0], src[1]);
+   case nir_op_isub:
+      return lower_isub64(b, src[0], src[1]);
+   case nir_op_imin:
+      return lower_imin64(b, src[0], src[1]);
+   case nir_op_imax:
+      return lower_imax64(b, src[0], src[1]);
+   case nir_op_umin:
+      return lower_umin64(b, src[0], src[1]);
+   case nir_op_umax:
+      return lower_umax64(b, src[0], src[1]);
+   case nir_op_iabs:
+      return lower_iabs64(b, src[0]);
+   case nir_op_ineg:
+      return lower_ineg64(b, src[0]);
+   case nir_op_iand:
+      return lower_iand64(b, src[0], src[1]);
+   case nir_op_ior:
+      return lower_ior64(b, src[0], src[1]);
+   case nir_op_ixor:
+      return lower_ixor64(b, src[0], src[1]);
+   case nir_op_inot:
+      return lower_inot64(b, src[0]);
    default:
       unreachable("Invalid ALU opcode to lower");
    }
@@ -448,9 +510,34 @@ lower_int64_impl(nir_function_impl *impl, nir_lower_int64_options options)
             continue;
 
          nir_alu_instr *alu = nir_instr_as_alu(instr);
-         assert(alu->dest.dest.is_ssa);
-         if (alu->dest.dest.ssa.bit_size != 64)
-            continue;
+         switch (alu->op) {
+         case nir_op_bcsel:
+            assert(alu->src[1].src.is_ssa);
+            assert(alu->src[2].src.is_ssa);
+            assert(alu->src[1].src.ssa->bit_size ==
+                   alu->src[2].src.ssa->bit_size);
+            if (alu->src[1].src.ssa->bit_size != 64)
+               continue;
+            break;
+         case nir_op_ieq:
+         case nir_op_ine:
+         case nir_op_ult:
+         case nir_op_ilt:
+         case nir_op_uge:
+         case nir_op_ige:
+            assert(alu->src[0].src.is_ssa);
+            assert(alu->src[1].src.is_ssa);
+            assert(alu->src[0].src.ssa->bit_size ==
+                   alu->src[1].src.ssa->bit_size);
+            if (alu->src[0].src.ssa->bit_size != 64)
+               continue;
+            break;
+         default:
+            assert(alu->dest.dest.is_ssa);
+            if (alu->dest.dest.ssa.bit_size != 64)
+               continue;
+            break;
+         }
 
          if (!(options & opcode_to_options_mask(alu->op)))
             continue;
-- 
2.16.4