[Mesa-dev] [PATCH 6/7] i965: Lower int64 operations if there is not hardware support

[Matt Turner]

---
 src/intel/compiler/brw_nir.c | 14 +++++++++++---
 1 file changed, 11 insertions(+), 3 deletions(-)

diff --git a/src/intel/compiler/brw_nir.c b/src/intel/compiler/brw_nir.c
index 066724c58a6..7eb9c385694 100644
--- a/src/intel/compiler/brw_nir.c
+++ b/src/intel/compiler/brw_nir.c
@@ -677,9 +677,17 @@ brw_preprocess_nir(const struct brw_compiler *compiler, nir_shader *nir)
    /* Lower int64 instructions before nir_optimize so that loop unrolling
     * sees their actual cost.
     */
-   while (nir_lower_int64(nir, nir_lower_imul64 |
-                               nir_lower_isign64 |
-                               nir_lower_divmod64));
+   nir_lower_int64_options options =
+      nir_lower_imul64 | nir_lower_isign64 | nir_lower_divmod64;
+   options |= devinfo->has_64bit_types ? 0 : (nir_lower_bcsel64 |
+                                              nir_lower_icmp64 |
+                                              nir_lower_iadd64 |
+                                              nir_lower_iabs64 |
+                                              nir_lower_ineg64 |
+                                              nir_lower_logic64 |
+                                              nir_lower_minmax64 |
+                                              nir_lower_shift64);
+   while (nir_lower_int64(nir, options));
 
    nir = brw_nir_optimize(nir, compiler, is_scalar, true);
 
-- 
2.16.4