[Mesa-dev] [RFC 4/7] spirv: Insert barriers to follow the Vulkan memory model

Iago Toral itoral at igalia.com
Wed Oct 17 06:27:30 UTC 2018


On Mon, 2018-09-10 at 13:04 -0500, Jason Ekstrand wrote:
> ---
>  src/compiler/spirv/spirv_to_nir.c | 170 ++++++++++++++++++--------
> ----
>  1 file changed, 103 insertions(+), 67 deletions(-)
> 
(...)
> @@ -2516,6 +2600,9 @@ vtn_handle_image(struct vtn_builder *b, SpvOp
> opcode,
>     } else {
>        nir_builder_instr_insert(&b->nb, &intrin->instr);
>     }
> +
> +   if (opcode == SpvOpAtomicStore)
> +      vtn_emit_memory_barrier(b, scope, semantics);

I think we need to emit the barrier for all "write" opcodes, not just
AtomicStore, right?

Iago


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