[Mesa-dev] [PATCH 14/15] winsys/amdgpu: add vcn jpeg cs support
boyuan.zhang at amd.com
boyuan.zhang at amd.com
Wed Oct 17 19:03:29 UTC 2018
From: Boyuan Zhang <boyuan.zhang at amd.com>
Add vcn jpeg cs support, align cs by no-op.
Signed-off-by: Boyuan Zhang <boyuan.zhang at amd.com>
Reviewed-by: Leo Liu <leo.liu at amd.com>
---
src/gallium/winsys/amdgpu/drm/amdgpu_cs.c | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c b/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c
index c0f8b442b1..5986810d4e 100644
--- a/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c
+++ b/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c
@@ -845,6 +845,10 @@ static bool amdgpu_init_cs_context(struct amdgpu_winsys *ws,
cs->ib[IB_MAIN].ip_type = AMDGPU_HW_IP_VCN_ENC;
break;
+ case RING_VCN_JPEG:
+ cs->ib[IB_MAIN].ip_type = AMDGPU_HW_IP_VCN_JPEG;
+ break;
+
case RING_COMPUTE:
case RING_GFX:
cs->ib[IB_MAIN].ip_type = ring_type == RING_GFX ? AMDGPU_HW_IP_GFX :
@@ -1589,6 +1593,14 @@ static int amdgpu_cs_flush(struct radeon_cmdbuf *rcs,
while (rcs->current.cdw & 15)
radeon_emit(rcs, 0x80000000); /* type2 nop packet */
break;
+ case RING_VCN_JPEG:
+ if (rcs->current.cdw % 2)
+ assert(0);
+ while (rcs->current.cdw & 15) {
+ radeon_emit(rcs, 0x60000000); /* nop packet */
+ radeon_emit(rcs, 0x00000000);
+ }
+ break;
case RING_VCN_DEC:
while (rcs->current.cdw & 15)
radeon_emit(rcs, 0x81ff); /* nop packet */
--
2.17.1
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