[Mesa-dev] [PATCH v2] radeonsi: fix a radeon kernel clear state error

[Michel Dänzer]

On 2018-10-19 4:45 p.m., Jiang, Sonny wrote:
> Signed-off-by: Sonny Jiang <sonny.jiang at amd.com>

Something like

radeonsi: Disable clear state with radeon kernel driver

might be a better shortlog. Also, please add

Fixes: f243980f2c1e "radeonsi:optimizing SET_CONTEXT_REG for shaders VS"

to the commit log.


> diff --git a/src/gallium/drivers/radeonsi/si_pipe.c b/src/gallium/drivers/radeonsi/si_pipe.c
> index 9d25748df4..a82171c2dc 100644
> --- a/src/gallium/drivers/radeonsi/si_pipe.c
> +++ b/src/gallium/drivers/radeonsi/si_pipe.c
> @@ -991,8 +991,10 @@ struct pipe_screen *radeonsi_screen_create(struct radeon_winsys *ws,
>  	}
>  
>  	/* The mere presense of CLEAR_STATE in the IB causes random GPU hangs
> -	 * on SI. */
> -	sscreen->has_clear_state = sscreen->info.chip_class >= CIK;
> +	 * on SI. Some CLEAR_STATE cause asic hang on radeon kernel, etc.
> +	 * SPI_VS_OUT_CONFIG. So only enable CI CLEAR_STATE on amdgpu kernel.*/

"SPI_VS_OUT_CONFIG." looks like a leftover.


Anyway,

Tested-by: Michel Dänzer <michel.daenzer at amd.com>

Thanks!


-- 
Earthling Michel Dänzer               |               http://www.amd.com
Libre software enthusiast             |             Mesa and X developer