[Mesa-dev] [PATCH] intel/compiler: Change src1 reg type to unsigned doubleword

[Sagar Ghuge]

Thank you for reviewing the patch. 

On 10/22/18 5:02 AM, Samuel Iglesias Gonsálvez wrote:
> 
> 
> On 20/10/18 3:25, Sagar Ghuge wrote:
>> To have uniform behavior while disassembling send(c) instruction use
>> register type of unsigned doubleword for src1 when message descriptor is
>> immediate value. Bspec does not specifiy anything for src1 immediate
> 
> s/specifiy/specify
> 
oops, I will fix it and resend the patch. I don't have push access. 

> With that fixed and assuming no problems appeared on Intel CI,
> 
Yes, I ran through CI and it looks like there are no failures. 

> Reviewed-by: Samuel Iglesias Gonsálvez <siglesias at igalia.com>
> 
> Sam
> 
>> default type.
>>
>> Signed-off-by: Sagar Ghuge <sagar.ghuge at intel.com>
>> ---
>>  src/intel/compiler/brw_eu_emit.c        | 2 +-
>>  src/intel/compiler/brw_fs_generator.cpp | 4 ++--
>>  2 files changed, 3 insertions(+), 3 deletions(-)
>>
>> diff --git a/src/intel/compiler/brw_eu_emit.c b/src/intel/compiler/brw_eu_emit.c
>> index 0cbc682ebc..4630b83b1a 100644
>> --- a/src/intel/compiler/brw_eu_emit.c
>> +++ b/src/intel/compiler/brw_eu_emit.c
>> @@ -371,7 +371,7 @@ brw_set_desc_ex(struct brw_codegen *p, brw_inst *inst,
>>     assert(brw_inst_opcode(devinfo, inst) == BRW_OPCODE_SEND ||
>>            brw_inst_opcode(devinfo, inst) == BRW_OPCODE_SENDC);
>>     brw_inst_set_src1_file_type(devinfo, inst,
>> -                               BRW_IMMEDIATE_VALUE, BRW_REGISTER_TYPE_D);
>> +                               BRW_IMMEDIATE_VALUE, BRW_REGISTER_TYPE_UD);
>>     brw_inst_set_send_desc(devinfo, inst, desc);
>>     if (devinfo->gen >= 9)
>>        brw_inst_set_send_ex_desc(devinfo, inst, ex_desc);
>> diff --git a/src/intel/compiler/brw_fs_generator.cpp b/src/intel/compiler/brw_fs_generator.cpp
>> index cb402cd4e7..08dd83dded 100644
>> --- a/src/intel/compiler/brw_fs_generator.cpp
>> +++ b/src/intel/compiler/brw_fs_generator.cpp
>> @@ -630,7 +630,7 @@ fs_generator::generate_urb_write(fs_inst *inst, struct brw_reg payload)
>>  
>>     brw_set_dest(p, insn, brw_null_reg());
>>     brw_set_src0(p, insn, payload);
>> -   brw_set_src1(p, insn, brw_imm_d(0));
>> +   brw_set_src1(p, insn, brw_imm_ud(0u));
>>  
>>     brw_inst_set_sfid(p->devinfo, insn, BRW_SFID_URB);
>>     brw_inst_set_urb_opcode(p->devinfo, insn, GEN8_URB_OPCODE_SIMD8_WRITE);
>> @@ -659,7 +659,7 @@ fs_generator::generate_cs_terminate(fs_inst *inst, struct brw_reg payload)
>>  
>>     brw_set_dest(p, insn, retype(brw_null_reg(), BRW_REGISTER_TYPE_UW));
>>     brw_set_src0(p, insn, retype(payload, BRW_REGISTER_TYPE_UW));
>> -   brw_set_src1(p, insn, brw_imm_d(0));
>> +   brw_set_src1(p, insn, brw_imm_ud(0u));
>>  
>>     /* Terminate a compute shader by sending a message to the thread spawner.
>>      */
>>
>