[Mesa-dev] [PATCH 24/31] glsl,spirv: Generate 1-bit booleans
Jason Ekstrand
jason at jlekstrand.net
Mon Oct 22 22:13:55 UTC 2018
---
src/compiler/glsl/glsl_to_nir.cpp | 4 ++--
src/compiler/nir/nir.h | 2 +-
src/compiler/nir/nir_opcodes_c.py | 8 ++++----
src/compiler/nir_types.h | 4 +++-
src/compiler/spirv/spirv_to_nir.c | 2 +-
5 files changed, 11 insertions(+), 9 deletions(-)
diff --git a/src/compiler/glsl/glsl_to_nir.cpp b/src/compiler/glsl/glsl_to_nir.cpp
index 0479f8fcfe4..8e106d097aa 100644
--- a/src/compiler/glsl/glsl_to_nir.cpp
+++ b/src/compiler/glsl/glsl_to_nir.cpp
@@ -263,7 +263,7 @@ constant_copy(ir_constant *ir, void *mem_ctx)
assert(cols == 1);
for (unsigned r = 0; r < rows; r++)
- ret->values[0].u32[r] = ir->value.b[r] ? NIR_TRUE : NIR_FALSE;
+ ret->values[0].b[r] = ir->value.b[r];
break;
@@ -1178,7 +1178,7 @@ nir_visitor::visit(ir_call *ir)
case nir_intrinsic_vote_any:
case nir_intrinsic_vote_all:
case nir_intrinsic_vote_ieq: {
- nir_ssa_dest_init(&instr->instr, &instr->dest, 1, 32, NULL);
+ nir_ssa_dest_init(&instr->instr, &instr->dest, 1, 1, NULL);
instr->num_components = 1;
ir_rvalue *value = (ir_rvalue *) ir->actual_parameters.get_head();
diff --git a/src/compiler/nir/nir.h b/src/compiler/nir/nir.h
index 7518ab5b94f..51775e5e18c 100644
--- a/src/compiler/nir/nir.h
+++ b/src/compiler/nir/nir.h
@@ -827,7 +827,7 @@ nir_get_nir_type_for_glsl_base_type(enum glsl_base_type base_type)
{
switch (base_type) {
case GLSL_TYPE_BOOL:
- return nir_type_bool32;
+ return nir_type_bool1;
break;
case GLSL_TYPE_UINT:
return nir_type_uint32;
diff --git a/src/compiler/nir/nir_opcodes_c.py b/src/compiler/nir/nir_opcodes_c.py
index fe3fcd4c677..8bfcda6d719 100644
--- a/src/compiler/nir/nir_opcodes_c.py
+++ b/src/compiler/nir/nir_opcodes_c.py
@@ -92,9 +92,9 @@ nir_type_conversion_op(nir_alu_type src, nir_alu_type dst, nir_rounding_mode rnd
% endfor
case nir_type_bool:
% if src_t == 'float':
- return nir_op_f2b32;
+ return nir_op_f2b;
% else:
- return nir_op_i2b32;
+ return nir_op_i2b;
% endif
default:
unreachable("Invalid nir alu base type");
@@ -104,9 +104,9 @@ nir_type_conversion_op(nir_alu_type src, nir_alu_type dst, nir_rounding_mode rnd
switch (dst_base) {
case nir_type_int:
case nir_type_uint:
- return nir_op_b322i;
+ return nir_op_b2i;
case nir_type_float:
- return nir_op_b322f;
+ return nir_op_b2f;
default:
unreachable("Invalid nir alu base type");
}
diff --git a/src/compiler/nir_types.h b/src/compiler/nir_types.h
index 77454fa9fab..60560b81242 100644
--- a/src/compiler/nir_types.h
+++ b/src/compiler/nir_types.h
@@ -95,9 +95,11 @@ static inline unsigned
glsl_get_bit_size(const struct glsl_type *type)
{
switch (glsl_get_base_type(type)) {
+ case GLSL_TYPE_BOOL:
+ return 1;
+
case GLSL_TYPE_INT:
case GLSL_TYPE_UINT:
- case GLSL_TYPE_BOOL:
case GLSL_TYPE_FLOAT: /* TODO handle mediump */
case GLSL_TYPE_SUBROUTINE:
return 32;
diff --git a/src/compiler/spirv/spirv_to_nir.c b/src/compiler/spirv/spirv_to_nir.c
index d0df9ea4718..b0a61d05406 100644
--- a/src/compiler/spirv/spirv_to_nir.c
+++ b/src/compiler/spirv/spirv_to_nir.c
@@ -1467,7 +1467,7 @@ vtn_handle_constant(struct vtn_builder *b, SpvOp opcode,
opcode == SpvOpSpecConstantFalse)
int_val = get_specialization(b, val, int_val);
- val->constant->values[0].u32[0] = int_val ? NIR_TRUE : NIR_FALSE;
+ val->constant->values[0].b[0] = int_val != 0;
break;
}
--
2.19.1
More information about the mesa-dev
mailing list