[Mesa-dev] [PATCH] radv: Emit enqueued pipeline barriers on event write.

[Samuel Pitoiset]

Cc stable?

On 10/23/18 10:59 AM, Bas Nieuwenhuizen wrote:
> Since the CPU can read them we need to execute any GPU->CPU
> flushes before the event is written.
> 
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108524
> Fixes: f4e499ec791 "radv: add initial non-conformant radv vulkan driver"
> ---
>   src/amd/vulkan/radv_cmd_buffer.c | 2 ++
>   1 file changed, 2 insertions(+)
> 
> diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c
> index 339704990e2..e21aaa9535d 100644
> --- a/src/amd/vulkan/radv_cmd_buffer.c
> +++ b/src/amd/vulkan/radv_cmd_buffer.c
> @@ -4337,6 +4337,8 @@ static void write_event(struct radv_cmd_buffer *cmd_buffer,
>   	struct radeon_cmdbuf *cs = cmd_buffer->cs;
>   	uint64_t va = radv_buffer_get_va(event->bo);
>   
> +	si_emit_cache_flush(cmd_buffer);
> +
>   	radv_cs_add_buffer(cmd_buffer->device->ws, cs, event->bo);
>   
>   	MAYBE_UNUSED unsigned cdw_max = radeon_check_space(cmd_buffer->device->ws, cs, 18);
>