[Mesa-dev] [PATCH] intel/compiler: Print hex representation along with floating point value

Samuel Iglesias Gonsálvez siglesias at igalia.com
Fri Oct 26 04:46:08 UTC 2018


Pushed both patches! :-)

Sam

On Thu, 2018-10-25 at 09:45 -0700, Sagar Ghuge wrote:
> Thank you for reviewing the patch. 
> 
> On 10/25/18 12:40 AM, Samuel Iglesias Gonsálvez wrote:
> > Reviewed-by: Samuel Iglesias Gonsálvez <siglesias at igalia.com>
> > 
> > Do you need somebody to push it to the repo? I can do it tomorrow.
> > 
> Yes, I don't have commit access. I really appreciate it.  
> > Sam
> > 
> > On Wednesday, 24 October 2018 22:27:27 (CEST) Sagar Ghuge wrote:
> > > While encoding the immediate floating point values in instruction
> > > we use
> > > values upto precision 9, but while disassembling, we print
> > > precision to
> > > 6 places, which round up the value and gives wrong interpretation
> > > for
> > > encoded immediate constant.
> > > 
> > > To avoid misinterpretation of encoded immediate values in
> > > instruction
> > > and disassembled output, print hex representation along with
> > > floating
> > > point value which can be used by assembler in future.
> > > 
> > > Signed-off-by: Sagar Ghuge <sagar.ghuge at intel.com>
> > > ---
> > >  src/intel/compiler/brw_disasm.c | 12 +++++++++---
> > >  1 file changed, 9 insertions(+), 3 deletions(-)
> > > 
> > > diff --git a/src/intel/compiler/brw_disasm.c
> > > b/src/intel/compiler/brw_disasm.c index 322f4544df..6a7e988641
> > > 100644
> > > --- a/src/intel/compiler/brw_disasm.c
> > > +++ b/src/intel/compiler/brw_disasm.c
> > > @@ -1283,7 +1283,9 @@ imm(FILE *file, const struct
> > > gen_device_info *devinfo,
> > > enum brw_reg_type type, format(file, "0x%08xUV",
> > > brw_inst_imm_ud(devinfo,
> > > inst));
> > >        break;
> > >     case BRW_REGISTER_TYPE_VF:
> > > -      format(file, "[%-gF, %-gF, %-gF, %-gF]VF",
> > > +      format(file, "0x%"PRIx64"VF", brw_inst_bits(inst, 127,
> > > 96));
> > > +      pad(file, 48);
> > > +      format(file, "/* [%-gF, %-gF, %-gF, %-gF]VF */",
> > >               brw_vf_to_float(brw_inst_imm_ud(devinfo, inst)),
> > >               brw_vf_to_float(brw_inst_imm_ud(devinfo, inst) >>
> > > 8),
> > >               brw_vf_to_float(brw_inst_imm_ud(devinfo, inst) >>
> > > 16),
> > > @@ -1293,10 +1295,14 @@ imm(FILE *file, const struct
> > > gen_device_info
> > > *devinfo, enum brw_reg_type type, format(file, "0x%08xV",
> > > brw_inst_imm_ud(devinfo, inst));
> > >        break;
> > >     case BRW_REGISTER_TYPE_F:
> > > -      format(file, "%-gF", brw_inst_imm_f(devinfo, inst));
> > > +      format(file, "0x%"PRIx64"F", brw_inst_bits(inst, 127,
> > > 96));
> > > +      pad(file, 48);
> > > +      format(file, " /* %-gF */", brw_inst_imm_f(devinfo,
> > > inst));
> > >        break;
> > >     case BRW_REGISTER_TYPE_DF:
> > > -      format(file, "%-gDF", brw_inst_imm_df(devinfo, inst));
> > > +      format(file, "0x%016"PRIx64"DF", brw_inst_bits(inst, 127,
> > > 64));
> > > +      pad(file, 48);
> > > +      format(file, "/* %-gDF */", brw_inst_imm_df(devinfo,
> > > inst));
> > >        break;
> > >     case BRW_REGISTER_TYPE_HF:
> > >        string(file, "Half Float IMM");
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