[Mesa-dev] [PATCH v2 2/3] i965/gen10+: Enable object level preemption.

Rafael Antognolli rafael.antognolli at intel.com
Mon Oct 29 17:40:39 UTC 2018


On Mon, Oct 29, 2018 at 05:29:10PM +0000, Chris Wilson wrote:
> Quoting Rafael Antognolli (2018-10-29 17:19:53)
> > +void
> > +brw_enable_obj_preemption(struct brw_context *brw, bool enable)
> > +{
> > +   const struct gen_device_info *devinfo = &brw->screen->devinfo;
> > +   assert(devinfo->gen >= 9);
> > +
> > +   if (enable == brw->object_preemption)
> > +      return;
> > +
> > +   /* A fixed function pipe flush is required before modifying this field */
> > +   brw_emit_pipe_control_flush(brw, PIPE_CONTROL_FLUSH_ENABLE);
> > +
> > +   bool replay_mode = enable ?
> > +      GEN9_REPLAY_MODE_MIDOBJECT : GEN9_REPLAY_MODE_MIDBUFFER;
> > +
> > +   /* enable object level preemption */
> > +   brw_load_register_imm32(brw, CS_CHICKEN1,
> > +                           replay_mode | GEN9_REPLAY_MODE_MASK);
> > +
> > +   brw->object_preemption = enable;
> > +}
> > +
> >  static void
> >  brw_upload_initial_gpu_state(struct brw_context *brw)
> >  {
> > @@ -153,6 +175,9 @@ brw_upload_initial_gpu_state(struct brw_context *brw)
> >           ADVANCE_BATCH();
> >        }
> >     }
> > +
> > +   if (devinfo->gen >= 10)
> 
> brw->object_preemption = false;
> 
> > +      brw_enable_obj_preemption(brw, true);
> 
> To force the LRI despite what the context may believe. (To accommodate
> recreating a logical context following a GPU hang.)
> -Chris

Fixing it locally, thanks.

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