[Mesa-dev] [ANNOUNCE] Mesa 18.2.4 release candidate

Juan A. Suarez Romero jasuarez at igalia.com
Mon Oct 29 22:51:56 UTC 2018

Hello list,

The candidate for the Mesa 18.2.4 is now available. Currently we have:
 - 22 queued
 - 0 nominated (outstanding)
 - and 1 rejected patch

The current queue consists of:

Different fixes for different drivers: freedreno, radeonsi, swr, anv and radv.

Also there are fixes for ac, gallium, spirv and blorp.

Take a look at section "Mesa stable queue" for more information

Testing reports/general approval
Any testing reports (or general approval of the state of the branch) will be
greatly appreciated.

The plan is to have 18.2.4 this Wednesday (31th October), around or shortly after 17:00

If you have any questions or suggestions - be that about the current patch queue
or otherwise, please go ahead.

Trivial merge conflicts
commit 37ba112d0772cb21ccbf1dd9abcdd3eefe692db7 (gitlab/jasuarez/18.2)
Author: David McFarland <corngood at gmail.com>

    util: Change remaining uint32 cache ids to sha1

    (cherry picked from commit 07a00a8729d709a4c43c828c64242c226607f09a)

commit 14d61206eb5fc3b73a9eec686dc8423fe266286a
Author: Jason Ekstrand <jason.ekstrand at intel.com>

    blorp: Emit a dummy 3DSTATE_WM prior to 3DSTATE_WM_HZ_OP

    (cherry picked from commit b6b2b27809b9ce1cb8fdeb63fb4244c8a584434e)

commit aaff8c7a0ed55d71e9dd0a6fef6905d6a2536c3f
Author: Nanley Chery <nanley.g.chery at intel.com>

    intel/blorp: Define the clear value bounds for HiZ clears

    (cherry picked from commit 5bcf479524b96554cab7d2429dacf650b4054638)

commit b8ddd70d04837ef24d5f0d3aff8a89f12d14f925
Author: Rob Clark <robdclark at gmail.com>

    freedreno: fix inorder rendering case

    (cherry picked from commit 12de415ad1abb67863f6efb7394552a12b9e3b4b)


Mesa stable queue

Nominated (0)

Queued (22)
Alex Smith (2):
      ac/nir: Use context-specific LLVM types
      anv: Fix sanitization of stencil state when the depth test is disabled

Alok Hota (2):
      swr/rast: ignore CreateElementUnorderedAtomicMemCpy
      swr/rast: fix intrinsic/function for LLVM 7 compatibility

Andres Rodriguez (1):
      radv: fix check for perftest options size

Bas Nieuwenhuizen (1):
      radv: Emit enqueued pipeline barriers on event write.

Connor Abbott (2):
      ac: Introduce ac_build_expand()
      ac: Fix loading a dvec3 from an SSBO

David McFarland (1):
      util: Change remaining uint32 cache ids to sha1

Dylan Baker (1):
      meson: don't require libelf for r600 without LLVM

Elie Tournier (1):
      gallium: Correctly handle no config context creation

Eric Engestrom (1):
      radv: s/abs/fabsf/ for floats

Jan Vesely (1):
      radeonsi: Bump number of allowed global buffers to 32

Jason Ekstrand (3):
      spirv: Use the right bit-size for spec constant ops
      blorp: Emit a dummy 3DSTATE_WM prior to 3DSTATE_WM_HZ_OP
      anv: Flag semaphore BOs as external

Liviu Prodea (1):
      scons: Put to rest zombie texture_float build option.

Marek Olšák (1):
      radeonsi: fix a VGT hang with primitive restart on Polaris10 and later

Michel Dänzer (1):
      loader/dri3: Also wait for front buffer fence if we triggered it

Nanley Chery (1):
      intel/blorp: Define the clear value bounds for HiZ clears

Rob Clark (2):
      freedreno: fix inorder rendering case
      freedreno: don't flush when new and old pfb is identical

Rejected (1)
Jason Ekstrand (1):
      aa02d7e8781 Revert "anv/skylake: disable ForceThreadDispatchEnable"
Reason: This commit reverts 0fa9e6d7b30 which did not land in branch.

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