[Mesa-dev] [PATCH 1/2] radeonsi: use better DCC clear codes

[Marek Olšák]

From: Marek Olšák <marek.olsak at amd.com>

---
 src/gallium/drivers/radeonsi/si_clear.c | 26 ++++++++++++++++++++-----
 1 file changed, 21 insertions(+), 5 deletions(-)

diff --git a/src/gallium/drivers/radeonsi/si_clear.c b/src/gallium/drivers/radeonsi/si_clear.c
index 8aa3355afc8..2900c31fd21 100644
--- a/src/gallium/drivers/radeonsi/si_clear.c
+++ b/src/gallium/drivers/radeonsi/si_clear.c
@@ -27,20 +27,29 @@
 
 #include "util/u_format.h"
 #include "util/u_pack_color.h"
 #include "util/u_surface.h"
 
 enum {
 	SI_CLEAR         = SI_SAVE_FRAGMENT_STATE,
 	SI_CLEAR_SURFACE = SI_SAVE_FRAMEBUFFER | SI_SAVE_FRAGMENT_STATE,
 };
 
+enum si_dcc_clear_code
+{
+    DCC_CLEAR_COLOR_0000         = 0x00000000,
+    DCC_CLEAR_COLOR_0001         = 0x40404040,
+    DCC_CLEAR_COLOR_1110         = 0x80808080,
+    DCC_CLEAR_COLOR_1111         = 0xC0C0C0C0,
+    DCC_CLEAR_COLOR_REG          = 0x20202020,
+};
+
 static void si_alloc_separate_cmask(struct si_screen *sscreen,
 				    struct si_texture *tex)
 {
 	if (tex->cmask_buffer || !tex->surface.cmask_size)
                 return;
 
 	tex->cmask_buffer =
 		si_aligned_buffer_create(&sscreen->b,
 					 SI_RESOURCE_FLAG_UNMAPPABLE,
 					 PIPE_USAGE_DEFAULT,
@@ -126,21 +135,21 @@ static bool vi_get_fast_clear_parameters(enum pipe_format base_format,
 	const struct util_format_description *desc =
 		util_format_description(si_simplify_cb_format(surface_format));
 
 	/* 128-bit fast clear with different R,G,B values is unsupported. */
 	if (desc->block.bits == 128 &&
 	    (color->ui[0] != color->ui[1] ||
 	     color->ui[0] != color->ui[2]))
 		return false;
 
 	*eliminate_needed = true;
-	*clear_value = 0x20202020U; /* use CB clear color registers */
+	*clear_value = DCC_CLEAR_COLOR_REG;
 
 	if (desc->layout != UTIL_FORMAT_LAYOUT_PLAIN)
 		return true; /* need ELIMINATE_FAST_CLEAR */
 
 	bool base_alpha_is_on_msb = vi_alpha_is_on_msb(base_format);
 	bool surf_alpha_is_on_msb = vi_alpha_is_on_msb(surface_format);
 
 	/* Formats with 3 channels can't have alpha. */
 	if (desc->nr_channels == 3)
 		alpha_channel = -1;
@@ -201,24 +210,31 @@ static bool vi_get_fast_clear_parameters(enum pipe_format base_format,
 		    values[i] != color_value)
 			return true; /* require ELIMINATE_FAST_CLEAR */
 	}
 
 	/* This doesn't need ELIMINATE_FAST_CLEAR.
 	 * CB uses both the DCC clear codes and the CB clear color registers,
 	 * so they must match.
 	 */
 	*eliminate_needed = false;
 
-	if (color_value)
-		*clear_value |= 0x80808080U;
-	if (alpha_value)
-		*clear_value |= 0x40404040U;
+	if (color_value) {
+		if (alpha_value)
+			*clear_value = DCC_CLEAR_COLOR_1111;
+		else
+			*clear_value = DCC_CLEAR_COLOR_1110;
+	} else {
+		if (alpha_value)
+			*clear_value = DCC_CLEAR_COLOR_0001;
+		else
+			*clear_value = DCC_CLEAR_COLOR_0000;
+	}
 	return true;
 }
 
 void vi_dcc_clear_level(struct si_context *sctx,
 			struct si_texture *tex,
 			unsigned level, unsigned clear_value)
 {
 	struct pipe_resource *dcc_buffer;
 	uint64_t dcc_offset, clear_size;
 
-- 
2.17.1