[Mesa-dev] [PATCH 2/2] intel/genxml: remove SLM Enable bit on Gen11

[Lionel Landwerlin]

Arg didn't this on anv which sets this be through genxml even though the 
documentation says it's reserved.

Will send an update.

On 07/09/2018 11:55, Lionel Landwerlin wrote:
> Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
> ---
> src/intel/genxml/gen11.xml | 1 -
> 1 file changed, 1 deletion(-)
>
> diff --git a/src/intel/genxml/gen11.xml b/src/intel/genxml/gen11.xml
> index 1b3befbbfc9..f497c2df825 100644
> --- a/src/intel/genxml/gen11.xml
> +++ b/src/intel/genxml/gen11.xml
> @@ -3544,7 +3544,6 @@
> </register>
> <register name="L3CNTLREG" length="1" num="0x7034">
> - <field name="SLM Enable" start="0" end="0" type="uint"/>
> <field name="URB Allocation" start="1" end="7" type="uint"/>
> <field name="RO Allocation" start="11" end="17" type="uint"/>
> <field name="DC Allocation" start="18" end="24" type="uint"/>