[Mesa-dev] [PATCH 2/4] anv: Implement a VF cache invalidate workaround
Kenneth Graunke
kenneth at whitecape.org
Fri Sep 7 20:13:42 UTC 2018
On Tuesday, August 21, 2018 6:57:49 PM PDT Jason Ekstrand wrote:
> Known to fix nothing whatsoever but it's in the docs.
> ---
> src/intel/vulkan/genX_cmd_buffer.c | 9 +++++++++
> 1 file changed, 9 insertions(+)
>
> diff --git a/src/intel/vulkan/genX_cmd_buffer.c b/src/intel/vulkan/genX_cmd_buffer.c
> index 18f80e8d1bd..75b3dd54275 100644
> --- a/src/intel/vulkan/genX_cmd_buffer.c
> +++ b/src/intel/vulkan/genX_cmd_buffer.c
> @@ -1743,6 +1743,9 @@ genX(cmd_buffer_apply_pipe_flushes)(struct anv_cmd_buffer *cmd_buffer)
> }
>
> if (bits & ANV_PIPE_INVALIDATE_BITS) {
> + if (bits & ANV_PIPE_VF_CACHE_INVALIDATE_BIT)
> + anv_batch_emit(&cmd_buffer->batch, GENX(PIPE_CONTROL), pipe);
This much should be GEN_GEN == 9 only.
If you want a citation, here's mine from iris_emit_raw_pipe_control:
/* The PIPE_CONTROL "VF Cache Invalidation Enable" bit description
* lists several workarounds:
*
* "Project: SKL, KBL, BXT
*
* If the VF Cache Invalidation Enable is set to a 1 in a
* PIPE_CONTROL, a separate Null PIPE_CONTROL, all bitfields
* sets to 0, with the VF Cache Invalidation Enable set to 0
* needs to be sent prior to the PIPE_CONTROL with VF Cache
* Invalidation Enable set to a 1."
*/
> +
> anv_batch_emit(&cmd_buffer->batch, GENX(PIPE_CONTROL), pipe) {
> pipe.StateCacheInvalidationEnable =
> bits & ANV_PIPE_STATE_CACHE_INVALIDATE_BIT;
> @@ -1754,6 +1757,12 @@ genX(cmd_buffer_apply_pipe_flushes)(struct anv_cmd_buffer *cmd_buffer)
> bits & ANV_PIPE_TEXTURE_CACHE_INVALIDATE_BIT;
> pipe.InstructionCacheInvalidateEnable =
> bits & ANV_PIPE_INSTRUCTION_CACHE_INVALIDATE_BIT;
> +
> + if (pipe.VFCacheInvalidationEnable) {
This should be Gen 8 and 9 only. If you care, citation is:
/* Project: BDW, SKL+ (stopping at CNL) / Argument: VF Invalidate
*
* "'Post Sync Operation' must be enabled to 'Write Immediate Data' or
* 'Write PS Depth Count' or 'Write Timestamp'."
*/
With those two parts updated for the appropriate gen, this would be
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
> + pipe.PostSyncOperation = WriteImmediateData;
> + pipe.Address =
> + (struct anv_address) { &cmd_buffer->device->workaround_bo, 0 };
> + }
> }
>
> bits &= ~ANV_PIPE_INVALIDATE_BITS;
>
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