[Mesa-dev] [PATCH 6/6] i965: Enable nir_opt_idiv_const for all bit sizes

[Ian Romanick]

On 09/13/2018 12:40 PM, Jason Ekstrand wrote:
> Shader-db results on Sky Lake:
> 
>     total instructions in shared programs: 15105795 -> 15111403 (0.04%)
>     instructions in affected programs: 72774 -> 78382 (7.71%)
>     helped: 0
>     HURT: 265
> 
> Note that hurt here actually means helped because we're getting rid of
> integer quotient operations (which are a send on some platforms!) and
> replacing them with fairly cheap ALU ops.

Yeah... We could probably do a (much easier) change to fix things like x
% (1U << constant), and it will have the same problem with shader-db
results.  Maybe we should add cycle times for INT_DIVIDE and
INT_REMAINDER first?  Since you already wrote a monster shader with
divides, most of the hard part is done... I think.

> ---
>  src/intel/compiler/brw_nir.c | 4 +++-
>  1 file changed, 3 insertions(+), 1 deletion(-)
> 
> diff --git a/src/intel/compiler/brw_nir.c b/src/intel/compiler/brw_nir.c
> index b38c3ba383d..4de0a6c44d4 100644
> --- a/src/intel/compiler/brw_nir.c
> +++ b/src/intel/compiler/brw_nir.c
> @@ -569,6 +569,7 @@ brw_nir_optimize(nir_shader *nir, const struct brw_compiler *compiler,
>        OPT(nir_opt_cse);
>        OPT(nir_opt_peephole_select, 0);
>        OPT(nir_opt_intrinsics);
> +      OPT(nir_opt_idiv_const, 0);
>        OPT(nir_opt_algebraic);
>        OPT(nir_opt_constant_folding);
>        OPT(nir_opt_dead_cf);
> @@ -675,7 +676,8 @@ brw_preprocess_nir(const struct brw_compiler *compiler, nir_shader *nir)
>      */
>     nir_lower_int64(nir, nir_lower_imul64 |
>                          nir_lower_isign64 |
> -                        nir_lower_divmod64);
> +                        nir_lower_divmod64 |
> +                        nir_lower_imul_high64);
>  
>     nir = brw_nir_optimize(nir, compiler, is_scalar, true);
>  
>