[Mesa-dev] [PATCH] intel/compiler: Export TCS passthrough creation
Jason Ekstrand
jason at jlekstrand.net
Fri Sep 21 20:37:38 UTC 2018
Wiring up TCS in some other driver?
Acked-by: Jason Ekstrand <jason at jlekstrand.net>
On September 21, 2018 22:30:25 Caio Marcelo de Oliveira Filho
<caio.oliveira at intel.com> wrote:
> Move create_passthrough_tcs() from i965 so can be used in other
> contexts.
> ---
> src/intel/compiler/brw_nir.c | 81 ++++++++++++++++++++++++++++
> src/intel/compiler/brw_nir.h | 5 ++
> src/mesa/drivers/dri/i965/brw_tcs.c | 83 +----------------------------
> 3 files changed, 87 insertions(+), 82 deletions(-)
>
> diff --git a/src/intel/compiler/brw_nir.c b/src/intel/compiler/brw_nir.c
> index b38c3ba383d..f61baee230a 100644
> --- a/src/intel/compiler/brw_nir.c
> +++ b/src/intel/compiler/brw_nir.c
> @@ -958,3 +958,84 @@ brw_glsl_base_type_for_nir_type(nir_alu_type type)
> unreachable("bad type");
> }
> }
> +
> +nir_shader *
> +brw_nir_create_passthrough_tcs(void *mem_ctx, const struct brw_compiler
> *compiler,
> + const nir_shader_compiler_options *options,
> + const struct brw_tcs_prog_key *key)
> +{
> + nir_builder b;
> + nir_builder_init_simple_shader(&b, mem_ctx, MESA_SHADER_TESS_CTRL,
> + options);
> + nir_shader *nir = b.shader;
> + nir_variable *var;
> + nir_intrinsic_instr *load;
> + nir_intrinsic_instr *store;
> + nir_ssa_def *zero = nir_imm_int(&b, 0);
> + nir_ssa_def *invoc_id =
> + nir_load_system_value(&b, nir_intrinsic_load_invocation_id, 0);
> +
> + nir->info.inputs_read = key->outputs_written &
> + ~(VARYING_BIT_TESS_LEVEL_INNER | VARYING_BIT_TESS_LEVEL_OUTER);
> + nir->info.outputs_written = key->outputs_written;
> + nir->info.tess.tcs_vertices_out = key->input_vertices;
> + nir->info.name = ralloc_strdup(nir, "passthrough");
> + nir->num_uniforms = 8 * sizeof(uint32_t);
> +
> + var = nir_variable_create(nir, nir_var_uniform, glsl_vec4_type(), "hdr_0");
> + var->data.location = 0;
> + var = nir_variable_create(nir, nir_var_uniform, glsl_vec4_type(), "hdr_1");
> + var->data.location = 1;
> +
> + /* Write the patch URB header. */
> + for (int i = 0; i <= 1; i++) {
> + load = nir_intrinsic_instr_create(nir, nir_intrinsic_load_uniform);
> + load->num_components = 4;
> + load->src[0] = nir_src_for_ssa(zero);
> + nir_ssa_dest_init(&load->instr, &load->dest, 4, 32, NULL);
> + nir_intrinsic_set_base(load, i * 4 * sizeof(uint32_t));
> + nir_builder_instr_insert(&b, &load->instr);
> +
> + store = nir_intrinsic_instr_create(nir, nir_intrinsic_store_output);
> + store->num_components = 4;
> + store->src[0] = nir_src_for_ssa(&load->dest.ssa);
> + store->src[1] = nir_src_for_ssa(zero);
> + nir_intrinsic_set_base(store, VARYING_SLOT_TESS_LEVEL_INNER - i);
> + nir_intrinsic_set_write_mask(store, WRITEMASK_XYZW);
> + nir_builder_instr_insert(&b, &store->instr);
> + }
> +
> + /* Copy inputs to outputs. */
> + uint64_t varyings = nir->info.inputs_read;
> +
> + while (varyings != 0) {
> + const int varying = ffsll(varyings) - 1;
> +
> + load = nir_intrinsic_instr_create(nir,
> + nir_intrinsic_load_per_vertex_input);
> + load->num_components = 4;
> + load->src[0] = nir_src_for_ssa(invoc_id);
> + load->src[1] = nir_src_for_ssa(zero);
> + nir_ssa_dest_init(&load->instr, &load->dest, 4, 32, NULL);
> + nir_intrinsic_set_base(load, varying);
> + nir_builder_instr_insert(&b, &load->instr);
> +
> + store = nir_intrinsic_instr_create(nir,
> +
> nir_intrinsic_store_per_vertex_output);
> + store->num_components = 4;
> + store->src[0] = nir_src_for_ssa(&load->dest.ssa);
> + store->src[1] = nir_src_for_ssa(invoc_id);
> + store->src[2] = nir_src_for_ssa(zero);
> + nir_intrinsic_set_base(store, varying);
> + nir_intrinsic_set_write_mask(store, WRITEMASK_XYZW);
> + nir_builder_instr_insert(&b, &store->instr);
> +
> + varyings &= ~BITFIELD64_BIT(varying);
> + }
> +
> + nir_validate_shader(nir);
> +
> + nir = brw_preprocess_nir(compiler, nir);
> +
> + return nir;
> +}
> diff --git a/src/intel/compiler/brw_nir.h b/src/intel/compiler/brw_nir.h
> index 06f0e8690e4..2ff8c72b94f 100644
> --- a/src/intel/compiler/brw_nir.h
> +++ b/src/intel/compiler/brw_nir.h
> @@ -164,6 +164,11 @@ nir_shader *brw_nir_optimize(nir_shader *nir,
> bool is_scalar,
> bool allow_copies);
>
> +nir_shader *brw_nir_create_passthrough_tcs(void *mem_ctx,
> + const struct brw_compiler
> *compiler,
> + const
> nir_shader_compiler_options *options,
> + const struct brw_tcs_prog_key
> *key);
> +
> #define BRW_NIR_FRAG_OUTPUT_INDEX_SHIFT 0
> #define BRW_NIR_FRAG_OUTPUT_INDEX_MASK INTEL_MASK(0, 0)
> #define BRW_NIR_FRAG_OUTPUT_LOCATION_SHIFT 1
> diff --git a/src/mesa/drivers/dri/i965/brw_tcs.c
> b/src/mesa/drivers/dri/i965/brw_tcs.c
> index 823933ef77f..17f4130c095 100644
> --- a/src/mesa/drivers/dri/i965/brw_tcs.c
> +++ b/src/mesa/drivers/dri/i965/brw_tcs.c
> @@ -34,87 +34,6 @@
> #include "program/prog_parameter.h"
> #include "nir_builder.h"
>
> -static nir_shader *
> -create_passthrough_tcs(void *mem_ctx, const struct brw_compiler *compiler,
> - const nir_shader_compiler_options *options,
> - const struct brw_tcs_prog_key *key)
> -{
> - nir_builder b;
> - nir_builder_init_simple_shader(&b, mem_ctx, MESA_SHADER_TESS_CTRL,
> - options);
> - nir_shader *nir = b.shader;
> - nir_variable *var;
> - nir_intrinsic_instr *load;
> - nir_intrinsic_instr *store;
> - nir_ssa_def *zero = nir_imm_int(&b, 0);
> - nir_ssa_def *invoc_id =
> - nir_load_system_value(&b, nir_intrinsic_load_invocation_id, 0);
> -
> - nir->info.inputs_read = key->outputs_written &
> - ~(VARYING_BIT_TESS_LEVEL_INNER | VARYING_BIT_TESS_LEVEL_OUTER);
> - nir->info.outputs_written = key->outputs_written;
> - nir->info.tess.tcs_vertices_out = key->input_vertices;
> - nir->info.name = ralloc_strdup(nir, "passthrough");
> - nir->num_uniforms = 8 * sizeof(uint32_t);
> -
> - var = nir_variable_create(nir, nir_var_uniform, glsl_vec4_type(), "hdr_0");
> - var->data.location = 0;
> - var = nir_variable_create(nir, nir_var_uniform, glsl_vec4_type(), "hdr_1");
> - var->data.location = 1;
> -
> - /* Write the patch URB header. */
> - for (int i = 0; i <= 1; i++) {
> - load = nir_intrinsic_instr_create(nir, nir_intrinsic_load_uniform);
> - load->num_components = 4;
> - load->src[0] = nir_src_for_ssa(zero);
> - nir_ssa_dest_init(&load->instr, &load->dest, 4, 32, NULL);
> - nir_intrinsic_set_base(load, i * 4 * sizeof(uint32_t));
> - nir_builder_instr_insert(&b, &load->instr);
> -
> - store = nir_intrinsic_instr_create(nir, nir_intrinsic_store_output);
> - store->num_components = 4;
> - store->src[0] = nir_src_for_ssa(&load->dest.ssa);
> - store->src[1] = nir_src_for_ssa(zero);
> - nir_intrinsic_set_base(store, VARYING_SLOT_TESS_LEVEL_INNER - i);
> - nir_intrinsic_set_write_mask(store, WRITEMASK_XYZW);
> - nir_builder_instr_insert(&b, &store->instr);
> - }
> -
> - /* Copy inputs to outputs. */
> - uint64_t varyings = nir->info.inputs_read;
> -
> - while (varyings != 0) {
> - const int varying = ffsll(varyings) - 1;
> -
> - load = nir_intrinsic_instr_create(nir,
> - nir_intrinsic_load_per_vertex_input);
> - load->num_components = 4;
> - load->src[0] = nir_src_for_ssa(invoc_id);
> - load->src[1] = nir_src_for_ssa(zero);
> - nir_ssa_dest_init(&load->instr, &load->dest, 4, 32, NULL);
> - nir_intrinsic_set_base(load, varying);
> - nir_builder_instr_insert(&b, &load->instr);
> -
> - store = nir_intrinsic_instr_create(nir,
> -
> nir_intrinsic_store_per_vertex_output);
> - store->num_components = 4;
> - store->src[0] = nir_src_for_ssa(&load->dest.ssa);
> - store->src[1] = nir_src_for_ssa(invoc_id);
> - store->src[2] = nir_src_for_ssa(zero);
> - nir_intrinsic_set_base(store, varying);
> - nir_intrinsic_set_write_mask(store, WRITEMASK_XYZW);
> - nir_builder_instr_insert(&b, &store->instr);
> -
> - varyings &= ~BITFIELD64_BIT(varying);
> - }
> -
> - nir_validate_shader(nir);
> -
> - nir = brw_preprocess_nir(compiler, nir);
> -
> - return nir;
> -}
> -
> static void
> brw_tcs_debug_recompile(struct brw_context *brw, struct gl_program *prog,
> const struct brw_tcs_prog_key *key)
> @@ -169,7 +88,7 @@ brw_codegen_tcs_prog(struct brw_context *brw, struct
> brw_program *tcp,
> } else {
> const nir_shader_compiler_options *options =
> ctx->Const.ShaderCompilerOptions[MESA_SHADER_TESS_CTRL].NirOptions;
> - nir = create_passthrough_tcs(mem_ctx, compiler, options, key);
> + nir = brw_nir_create_passthrough_tcs(mem_ctx, compiler, options, key);
> }
>
> memset(&prog_data, 0, sizeof(prog_data));
> --
> 2.19.0
>
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