[Mesa-dev] [PATCH] radeonsi: don't use PFP_SYNC_ME with compute-only contexts

[Marek Olšák]

From: Marek Olšák <marek.olsak at amd.com>

Fixes: a1378639ab1 "radeonsi: always use compute rings for clover on CI and newer (v2)"
---
 src/gallium/drivers/radeonsi/si_cp_dma.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/gallium/drivers/radeonsi/si_cp_dma.c b/src/gallium/drivers/radeonsi/si_cp_dma.c
index 5993369d2da..f349325202c 100644
--- a/src/gallium/drivers/radeonsi/si_cp_dma.c
+++ b/src/gallium/drivers/radeonsi/si_cp_dma.c
@@ -124,21 +124,21 @@ static void si_emit_cp_dma(struct si_context *sctx, struct radeon_cmdbuf *cs,
 		radeon_emit(cs, dst_va);	/* DST_ADDR_LO [31:0] */
 		radeon_emit(cs, (dst_va >> 32) & 0xffff); /* DST_ADDR_HI [15:0] */
 		radeon_emit(cs, command);
 	}
 
 	/* CP DMA is executed in ME, but index buffers are read by PFP.
 	 * This ensures that ME (CP DMA) is idle before PFP starts fetching
 	 * indices. If we wanted to execute CP DMA in PFP, this packet
 	 * should precede it.
 	 */
-	if (flags & CP_DMA_PFP_SYNC_ME) {
+	if (sctx->has_graphics && flags & CP_DMA_PFP_SYNC_ME) {
 		radeon_emit(cs, PKT3(PKT3_PFP_SYNC_ME, 0, 0));
 		radeon_emit(cs, 0);
 	}
 }
 
 void si_cp_dma_wait_for_idle(struct si_context *sctx)
 {
 	/* Issue a dummy DMA that copies zero bytes.
 	 *
 	 * The DMA engine will see that there's no work to do and skip this
-- 
2.17.1