[Mesa-dev] [PATCH] intel/disasm: Disassemble JIP offset for while

[Anuj Phogat]

On Wed, Mar 27, 2019 at 5:12 PM Sagar Ghuge <sagar.ghuge at intel.com> wrote:
>
> Signed-off-by: Sagar Ghuge <sagar.ghuge at intel.com>
> ---
>  src/intel/compiler/brw_disasm.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/src/intel/compiler/brw_disasm.c b/src/intel/compiler/brw_disasm.c
> index efca3e2ce7d..440e51faa61 100644
> --- a/src/intel/compiler/brw_disasm.c
> +++ b/src/intel/compiler/brw_disasm.c
> @@ -1661,7 +1661,8 @@ brw_disassemble_inst(FILE *file, const struct gen_device_info *devinfo,
>        format(file, "Pop: %"PRIu64, brw_inst_gen4_pop_count(devinfo, inst));
>     } else if (devinfo->gen < 6 && (opcode == BRW_OPCODE_IF ||
>                                     opcode == BRW_OPCODE_IFF ||
> -                                   opcode == BRW_OPCODE_HALT)) {
> +                                   opcode == BRW_OPCODE_HALT ||
> +                                   opcode == BRW_OPCODE_WHILE)) {
>        pad(file, 16);
>        format(file, "Jump: %d", brw_inst_gen4_jump_count(devinfo, inst));
>     } else if (devinfo->gen < 6 && opcode == BRW_OPCODE_ENDIF) {
> --
> 2.20.1
>
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looks fine to me.
Reviewed-by: Anuj Phogat <anuj.phogat at gmail.com>