[Mesa-dev] [PATCH v2 1/2] radeon/uvd: fix width alignment for hevc encoding
Lei Zhou
zhoulei at kylinos.cn
Thu Apr 18 16:14:10 UTC 2019
The width alignment for HEVC encoding should be 64 due to hardware
requirement. This will fix conformance_window_flag in SPS.
Signed-off-by: Lei Zhou <zhoulei at kylinos.cn>
---
src/gallium/drivers/radeon/radeon_uvd_enc.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/src/gallium/drivers/radeon/radeon_uvd_enc.c b/src/gallium/drivers/radeon/radeon_uvd_enc.c
index 3164dbb2c20..2680e4af482 100644
--- a/src/gallium/drivers/radeon/radeon_uvd_enc.c
+++ b/src/gallium/drivers/radeon/radeon_uvd_enc.c
@@ -65,8 +65,9 @@ radeon_uvd_enc_get_param(struct radeon_uvd_encoder *enc,
(pic->picture_type == PIPE_H265_ENC_PICTURE_TYPE_IDR)
|| (pic->picture_type == PIPE_H265_ENC_PICTURE_TYPE_I);
enc->enc_pic.crop_left = 0;
+ /* width should aligned to 64 due to hardware requirement */
enc->enc_pic.crop_right =
- (align(enc->base.width, 16) - enc->base.width) / 2;
+ (align(enc->base.width, 64) - enc->base.width) / 2;
enc->enc_pic.crop_top = 0;
enc->enc_pic.crop_bottom =
(align(enc->base.height, 16) - enc->base.height) / 2;
--
2.21.0
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