[Mesa-dev] [PATCH] radeonsi: don't ignore PIPE_FLUSH_ASYNC

[Marek Olšák]

From: Marek Olšák <marek.olsak at amd.com>

---
 src/gallium/drivers/radeonsi/si_fence.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/gallium/drivers/radeonsi/si_fence.c b/src/gallium/drivers/radeonsi/si_fence.c
index 3d23597413c..ffda98d2834 100644
--- a/src/gallium/drivers/radeonsi/si_fence.c
+++ b/src/gallium/drivers/radeonsi/si_fence.c
@@ -566,21 +566,21 @@ static void si_flush_from_st(struct pipe_context *ctx,
 		multi_fence->fine = fine;
 		fine.buf = NULL;
 
 		if (flags & TC_FLUSH_ASYNC) {
 			util_queue_fence_signal(&multi_fence->ready);
 			tc_unflushed_batch_token_reference(&multi_fence->tc_token, NULL);
 		}
 	}
 	assert(!fine.buf);
 finish:
-	if (!(flags & PIPE_FLUSH_DEFERRED)) {
+	if (!(flags & (PIPE_FLUSH_DEFERRED | PIPE_FLUSH_ASYNC))) {
 		if (sctx->dma_cs)
 			ws->cs_sync_flush(sctx->dma_cs);
 		ws->cs_sync_flush(sctx->gfx_cs);
 	}
 }
 
 static void si_fence_server_signal(struct pipe_context *ctx,
 				   struct pipe_fence_handle *fence)
 {
 	struct si_context *sctx = (struct si_context *)ctx;
-- 
2.17.1