[Mesa-dev] [PATCH] radeon/vcn: enable rate control for hevc encoding

Alex Deucher alexdeucher at gmail.com
Fri Dec 13 22:01:38 UTC 2019


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On Fri, Dec 13, 2019 at 4:43 PM Zhang, Boyuan <Boyuan.Zhang at amd.com> wrote:
>
> Port changes from radeon_vcn_enc_1_2.c to radeon_vcn_enc_2_0.c
>
>
>
> Set cu_qp_delta_enable_flag on when rate control is enabled, and set it
>
> off when rate control is disabled (e.g. constant qp).
>
>
>
> Signed-off-by: Boyuan Zhang <boyuan.zhang at amd.com>
>
> ---
>
>  src/gallium/drivers/radeon/radeon_vcn_enc_2_0.c | 8 +++++++-
>
>  1 file changed, 7 insertions(+), 1 deletion(-)
>
>
>
> diff --git a/src/gallium/drivers/radeon/radeon_vcn_enc_2_0.c b/src/gallium/drivers/radeon/radeon_vcn_enc_2_0.c
>
> index d2c6378a055..580a084a1c1 100644
>
> --- a/src/gallium/drivers/radeon/radeon_vcn_enc_2_0.c
>
> +++ b/src/gallium/drivers/radeon/radeon_vcn_enc_2_0.c
>
> @@ -196,7 +196,13 @@ static void radeon_enc_nalu_pps_hevc(struct radeon_encoder *enc)
>
>   radeon_enc_code_se(enc, 0x0);
>
>   radeon_enc_code_fixed_bits(enc, enc->enc_pic.hevc_spec_misc.constrained_intra_pred_flag, 1);
>
>   radeon_enc_code_fixed_bits(enc, 0x0, 1);
>
> - radeon_enc_code_fixed_bits(enc, 0x0, 1);
>
> + if (enc->enc_pic.rc_session_init.rate_control_method ==
>
> + RENCODE_RATE_CONTROL_METHOD_NONE)
>
> + radeon_enc_code_fixed_bits(enc, 0x0, 1);
>
> + else {
>
> + radeon_enc_code_fixed_bits(enc, 0x1, 1);
>
> + radeon_enc_code_ue(enc, 0x0);
>
> + }
>
>   radeon_enc_code_se(enc, enc->enc_pic.hevc_deblock.cb_qp_offset);
>
>   radeon_enc_code_se(enc, enc->enc_pic.hevc_deblock.cr_qp_offset);
>
>   radeon_enc_code_fixed_bits(enc, 0x0, 1);
>
> --
>
> 2.17.1
>
>
>
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