[Mesa-dev] [PATCH v3 00/44] VK_KHR_shader_float_controls implementation for ANV
Samuel Iglesias Gonsálvez
siglesias at igalia.com
Wed Feb 6 10:44:29 UTC 2019
Hello,
This is the third version of the VK_KHR_shader_float_controls implementation
for Intel's Vulkan driver, ANV.
You can clone this branch by executing this command:
$ git clone -b siglesias/VK_KHR_shader_float_controls-v3 \
https://github.com/Igalia/mesa.git
Remember that this branch depends on VK_KHR_shader_float16_int8 patches
that are under review.
The changes from v2 are:
- Fixed handling of rounding, signed zero, inf and NAN preserve modes
for different daya types.
- Added rounding mode support for more opcodes that are correctly rounded:
fadd, fsub, fmul, ldexp, Fract, {Matrix,Vector}TimesScalar, ModF,
FaceForward. The rest are not implemented as it makes no sense in my
opinion: fabs, fsign, ftrunc, fmax, fmin, fclamp, step, ffloor, roundEven,
round (implementation-specific), fceil, frexp. Let me know if I should
implement support for more operations.
- Addressed v2 feedback: move some code from nir_constant_expressions.py to
nir_opcodes.py, fix bug in nir_constant_expressions.py related to bit_size,
fix bug in nir_loop_analyze.c related to float controls mode usage.
- Fixed several bugs found while working on this v3.
Thanks,
Sam
Samuel Iglesias Gonsálvez (44):
spirv: check support for SPV_KHR_shader_float_controls capabilities
spirv/nir: keep track of SPV_KHR_shader_float_controls execution modes
nir: add auxiliary functions to detect if a mode is enabled
nir: add support for flushing to zero denorm constants
spirv/glsl450: fix atan2(0,0) lowering
spirv/glsl450: fix atan2(x, x) case
spirv/glsl450: fix reflect(denorm, denorm) FTZ = 0.0 case
util: added float to float16 conversions with RTZ and RTNE
util: add fp64 -> fp32 conversion support for RTNE and RTZ rounding
modes
nir: add rounding mode support to Opcode class in nir_opcodes.py
nir: add new floating point conversion opcodes taking into account
rounding mode
nir: add new fadd,fsub,fmul opcodes taking into account rounding mode
nir: add new ldexp opcodes taking into account rounding mode
nir: add new fdot* opcodes taking into account rounding mode
nir: add new ffract opcodes taking into account rounding mode
nir/constant_expressions: take into account rounding mode to convert
from float to float16 destinations
nir/algebraic: disable inexact optimizations if
SHADER_SIGNED_ZERO_INF_NAN_PRESERVE is enabled
nir/algebraic: add optimizations for fadd, fsub and fmul with rounding
mode
nir/algebraic: add lowerings for ldexp with rounding modes
spirv/nir: add rounding mode support for floating-point conversions
spirv/nir: add rounding mode support for fadd, fsub, fmul
spirv/nir: add rounding mode support for SpvOpVectorTimesScalar and
SpvOpMatrixTimesScalar
spirv/nir: add rounding mode support for GLSLstd450Ldexp
spirv/nir: add rounding mode support for FaceForward opcode
spirv/nir: add rounding mode support for GLSLstd450Modf opcode
spirv/nir: add rounding mode support for GLSLstd450Fract opcode
nir: fix denorms in unpack_half_1x16()
nir: fix denorm flush-to-zero in sqrt's lowering at
nir_lower_double_ops
nir: fix fmin/fmax support for doubles
intel/nir: call nir_opt_constant_folding before
brw_nir_apply_trig_workarounds
i965/fs: add nir_op_f2f*_{rtne,rtz}
i965/fs: add nir_op_ffract_{rtne,rtz} support
i965/fs/nir: check that fdot*_{rtne,rtz} was properly lowered
i965/fs/nir: add nir_op_unpack_half_2x16_split_*_flush_to_zero
i965/fs/generator: add support to set floating points modes in control
register
i965/fs: define emit_shader_float_controls_execution_mode() and aux
functions
i965/fs: emit shader float controls execution modes as first
instruction of shaders
i965/fs: set rounding mode when emitting affected conversion
instructions
i965/fs: set rounding mode when emitting the respective fadd and fmul
instructions
i965/fs: remove brw_rounding_mode() and use brw_float_controls_mode()
instead
i965/fs: add support for shader float control to
remove_extra_rounding_modes()
anv: add support for
VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_FLOAT_CONTROLS_PROPERTIES_KHR
anv: enable support for SPV_KHR_shader_float_controls capabilities
anv: enable VK_KHR_shader_float_controls extension
src/compiler/nir/nir.h | 85 ++++++++
src/compiler/nir/nir_algebraic.py | 13 +-
src/compiler/nir/nir_builder.h | 32 +++
src/compiler/nir/nir_constant_expressions.h | 3 +-
src/compiler/nir/nir_constant_expressions.py | 97 ++++++++-
src/compiler/nir/nir_loop_analyze.c | 22 +-
src/compiler/nir/nir_lower_alu_to_scalar.c | 20 +-
src/compiler/nir/nir_lower_double_ops.c | 9 +-
src/compiler/nir/nir_opcodes.py | 201 +++++++++++++------
src/compiler/nir/nir_opcodes_c.py | 8 +-
src/compiler/nir/nir_opt_algebraic.py | 143 +++++++++++++
src/compiler/nir/nir_opt_constant_folding.c | 15 +-
src/compiler/shader_enums.h | 20 ++
src/compiler/shader_info.h | 4 +
src/compiler/spirv/spirv_to_nir.c | 51 ++++-
src/compiler/spirv/vtn_alu.c | 62 +++++-
src/compiler/spirv/vtn_glsl450.c | 98 +++++++--
src/intel/compiler/brw_eu.h | 4 +-
src/intel/compiler/brw_eu_defines.h | 10 +
src/intel/compiler/brw_eu_emit.c | 52 ++---
src/intel/compiler/brw_fs.cpp | 24 ++-
src/intel/compiler/brw_fs.h | 1 +
src/intel/compiler/brw_fs_generator.cpp | 19 +-
src/intel/compiler/brw_fs_nir.cpp | 42 +++-
src/intel/compiler/brw_fs_visitor.cpp | 56 ++++++
src/intel/compiler/brw_nir.c | 4 +-
src/intel/compiler/brw_shader.cpp | 3 +
src/intel/vulkan/anv_device.c | 31 +++
src/intel/vulkan/anv_extensions.py | 1 +
src/intel/vulkan/anv_pipeline.c | 1 +
src/util/Makefile.sources | 2 +
src/util/double.c | 197 ++++++++++++++++++
src/util/double.h | 46 +++++
src/util/half_float.c | 74 +++++++
src/util/half_float.h | 7 +
src/util/meson.build | 2 +
36 files changed, 1291 insertions(+), 168 deletions(-)
create mode 100644 src/util/double.c
create mode 100644 src/util/double.h
--
2.19.1
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