[Mesa-dev] [PATCH v3 13/44] nir: add new ldexp opcodes taking into account rounding mode

Samuel Iglesias Gonsálvez siglesias at igalia.com
Wed Feb 6 10:44:42 UTC 2019


According to Vulkan spec, the new execution modes affect only
correctly rounded SPIR-V instructions, which is the case for ldexp.

Signed-off-by: Samuel Iglesias Gonsálvez <siglesias at igalia.com>
---
 src/compiler/nir/nir_opcodes.py | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/src/compiler/nir/nir_opcodes.py b/src/compiler/nir/nir_opcodes.py
index 7b45d38f460..d0087d350a8 100644
--- a/src/compiler/nir/nir_opcodes.py
+++ b/src/compiler/nir/nir_opcodes.py
@@ -772,6 +772,20 @@ if (!isnormal(dst))
    dst = copysignf(0.0f, src0);
 """, "")
 
+opcode("ldexp_rtne", 0, tfloat, [0, 0], [tfloat, tint32], False, "", """
+dst = (bit_size == 64) ? _mesa_roundeven(ldexp(src0, src1)) : _mesa_roundevenf(ldexpf(src0, src1));
+/* flush denormals to zero. */
+if (!isnormal(dst))
+   dst = copysignf(0.0f, src0);
+""", "_rtne")
+
+opcode("ldexp_rtz", 0, tfloat, [0, 0], [tfloat, tint32], False, "", """
+dst = (bit_size == 64) ? ldexp(src0, src1) : ldexpf(src0, src1);
+/* flush denormals to zero. */
+if (!isnormal(dst))
+   dst = copysignf(0.0f, src0);
+""", "_rtz")
+
 # Combines the first component of each input to make a 2-component vector.
 
 binop_horiz("vec2", 2, tuint, 1, tuint, 1, tuint, """
-- 
2.19.1



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