[Mesa-dev] [PATCH v2 04/41] ac/nir: implement 8-bit push constant, ssbo and ubo loads

Rhys Perry pendingchaos02 at gmail.com
Sat Feb 16 00:21:53 UTC 2019


Signed-off-by: Rhys Perry <pendingchaos02 at gmail.com>
---
 src/amd/common/ac_nir_to_llvm.c | 37 +++++++++++++++++++++++++++------
 1 file changed, 31 insertions(+), 6 deletions(-)

diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index bed52490bad..17d952d1ae8 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@ -1399,7 +1399,30 @@ static LLVMValueRef visit_load_push_constant(struct ac_nir_context *ctx,
 
 	ptr = ac_build_gep0(&ctx->ac, ctx->abi->push_constants, addr);
 
-	if (instr->dest.ssa.bit_size == 16) {
+	if (instr->dest.ssa.bit_size == 8) {
+		unsigned load_dwords = instr->dest.ssa.num_components > 1 ? 2 : 1;
+		LLVMTypeRef vec_type = LLVMVectorType(LLVMInt8TypeInContext(ctx->ac.context), 4 * load_dwords);
+		ptr = ac_cast_ptr(&ctx->ac, ptr, vec_type);
+		LLVMValueRef res = LLVMBuildLoad(ctx->ac.builder, ptr, "");
+
+		LLVMValueRef params[3];
+		if (load_dwords > 1) {
+			LLVMValueRef res_vec = LLVMBuildBitCast(ctx->ac.builder, res, LLVMVectorType(ctx->ac.i32, 2), "");
+			params[0] = LLVMBuildExtractElement(ctx->ac.builder, res_vec, LLVMConstInt(ctx->ac.i32, 1, false), "");
+			params[1] = LLVMBuildExtractElement(ctx->ac.builder, res_vec, LLVMConstInt(ctx->ac.i32, 0, false), "");
+		} else {
+			res = LLVMBuildBitCast(ctx->ac.builder, res, ctx->ac.i32, "");
+			params[0] = ctx->ac.i32_0;
+			params[1] = res;
+		}
+		params[2] = addr;
+		res = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.alignbyte", ctx->ac.i32, params, 3, 0);
+
+		res = LLVMBuildTrunc(ctx->ac.builder, res, LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.num_components * 8), "");
+		if (instr->dest.ssa.num_components > 1)
+			res = LLVMBuildBitCast(ctx->ac.builder, res, LLVMVectorType(LLVMInt8TypeInContext(ctx->ac.context), instr->dest.ssa.num_components), "");
+		return res;
+	} else if (instr->dest.ssa.bit_size == 16) {
 		unsigned load_dwords = instr->dest.ssa.num_components / 2 + 1;
 		LLVMTypeRef vec_type = LLVMVectorType(LLVMInt16TypeInContext(ctx->ac.context), 2 * load_dwords);
 		ptr = ac_cast_ptr(&ctx->ac, ptr, vec_type);
@@ -1676,7 +1699,7 @@ static LLVMValueRef visit_load_buffer(struct ac_nir_context *ctx,
 		LLVMValueRef immoffset = LLVMConstInt(ctx->ac.i32, i * elem_size_bytes, false);
 
 		LLVMValueRef ret;
-		if (load_bytes == 2) {
+		if (load_bytes <= 2) {
 			ret = ac_build_tbuffer_load_short_byte(&ctx->ac,
 							       rsrc,
 							       vindex,
@@ -1684,7 +1707,7 @@ static LLVMValueRef visit_load_buffer(struct ac_nir_context *ctx,
 							       ctx->ac.i32_0,
 							       immoffset,
 							       glc,
-							       2);
+							       load_bytes);
 		} else {
 			const char *load_name;
 			LLVMTypeRef data_type;
@@ -1700,6 +1723,7 @@ static LLVMValueRef visit_load_buffer(struct ac_nir_context *ctx,
 				data_type = ctx->ac.v2f32;
 				break;
 			case 4:
+			case 3:
 				load_name = "llvm.amdgcn.buffer.load.f32";
 				data_type = ctx->ac.f32;
 				break;
@@ -1746,7 +1770,8 @@ static LLVMValueRef visit_load_ubo_buffer(struct ac_nir_context *ctx,
 	if (instr->dest.ssa.bit_size == 64)
 		num_components *= 2;
 
-	if (instr->dest.ssa.bit_size == 16) {
+	if (instr->dest.ssa.bit_size == 16 || instr->dest.ssa.bit_size == 8) {
+		unsigned size = instr->dest.ssa.bit_size / 8;
 		LLVMValueRef results[num_components];
 		for (unsigned i = 0; i < num_components; ++i) {
 			results[i] = ac_build_tbuffer_load_short_byte(&ctx->ac,
@@ -1754,9 +1779,9 @@ static LLVMValueRef visit_load_ubo_buffer(struct ac_nir_context *ctx,
 								      ctx->ac.i32_0,
 								      offset,
 								      ctx->ac.i32_0,
-								      LLVMConstInt(ctx->ac.i32, 2 * i, 0),
+								      LLVMConstInt(ctx->ac.i32, size * i, 0),
 								      ctx->ac.i1false,
-								      2);
+								      size);
 		}
 		ret = ac_build_gather_values(&ctx->ac, results, num_components);
 	} else {
-- 
2.20.1



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