[Mesa-dev] [PATCH 2/2] amd/common/vi+: enable SMEM loads with GLC=1
Bas Nieuwenhuizen
bas at basnieuwenhuizen.nl
Sat Jan 12 09:46:05 UTC 2019
Reviewed-by: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
for both.
On Thu, Jan 10, 2019 at 11:26 PM Nicolai Hähnle <nhaehnle at gmail.com> wrote:
>
> From: Nicolai Hähnle <nicolai.haehnle at amd.com>
>
> Only on LLVM 8.0+, which supports the new intrinsic.
> ---
> src/amd/common/ac_llvm_build.c | 10 +++++++---
> 1 file changed, 7 insertions(+), 3 deletions(-)
>
> diff --git a/src/amd/common/ac_llvm_build.c b/src/amd/common/ac_llvm_build.c
> index 4d7f15901e3..6aa96ee86d4 100644
> --- a/src/amd/common/ac_llvm_build.c
> +++ b/src/amd/common/ac_llvm_build.c
> @@ -1223,36 +1223,40 @@ ac_build_buffer_load(struct ac_llvm_context *ctx,
> unsigned slc,
> bool can_speculate,
> bool allow_smem)
> {
> LLVMValueRef offset = LLVMConstInt(ctx->i32, inst_offset, 0);
> if (voffset)
> offset = LLVMBuildAdd(ctx->builder, offset, voffset, "");
> if (soffset)
> offset = LLVMBuildAdd(ctx->builder, offset, soffset, "");
>
> - /* TODO: VI and later generations can use SMEM with GLC=1.*/
> - if (allow_smem && !glc && !slc) {
> + if (allow_smem && !slc &&
> + (!glc || (HAVE_LLVM >= 0x0800 && ctx->chip_class >= VI))) {
> assert(vindex == NULL);
>
> LLVMValueRef result[8];
>
> for (int i = 0; i < num_channels; i++) {
> if (i) {
> offset = LLVMBuildAdd(ctx->builder, offset,
> LLVMConstInt(ctx->i32, 4, 0), "");
> }
> const char *intrname =
> HAVE_LLVM >= 0x0800 ? "llvm.amdgcn.s.buffer.load.f32"
> : "llvm.SI.load.const";
> unsigned num_args = HAVE_LLVM >= 0x0800 ? 3 : 2;
> - LLVMValueRef args[3] = {rsrc, offset, ctx->i32_0};
> + LLVMValueRef args[3] = {
> + rsrc,
> + offset,
> + glc ? ctx->i32_1 : ctx->i32_0,
> + };
> result[i] = ac_build_intrinsic(ctx, intrname,
> ctx->f32, args, num_args,
> AC_FUNC_ATTR_READNONE |
> (HAVE_LLVM < 0x0800 ? AC_FUNC_ATTR_LEGACY : 0));
> }
> if (num_channels == 1)
> return result[0];
>
> if (num_channels == 3)
> result[num_channels++] = LLVMGetUndef(ctx->f32);
> --
> 2.19.1
>
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