[Mesa-dev] [PATCH v2 23/32] intel/isl: Allow Yf and Ys tiling

[Nanley Chery]

On Fri, Oct 12, 2018 at 01:46:53PM -0500, Jason Ekstrand wrote:
> They are both implemented in ISL now.  Instead of disabling them in ISL,
> we disable them in the two dirvers.

"drivers" is misspelled.

> 
> Reviewed-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
> ---
>  src/intel/isl/isl_gen7.c                      | 8 --------
>  src/intel/vulkan/anv_image.c                  | 3 +++
>  src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 5 +++++
>  3 files changed, 8 insertions(+), 8 deletions(-)
> 
> diff --git a/src/intel/isl/isl_gen7.c b/src/intel/isl/isl_gen7.c
> index fe420e4fbd8..51958f7e2d5 100644
> --- a/src/intel/isl/isl_gen7.c
> +++ b/src/intel/isl/isl_gen7.c
> @@ -206,14 +206,6 @@ isl_gen6_filter_tiling(const struct isl_device *dev,
>        *flags &= ~ISL_TILING_GEN10_Ys_BIT;
>     }
>  
> -   /* And... clear the Yf and Ys bits anyway because Anvil doesn't support
> -    * them yet.
> -    */
> -   *flags &= ~ISL_TILING_GEN9_Yf_BIT; /* FINISHME[SKL]: Support Yf */
> -   *flags &= ~ISL_TILING_GEN9_Ys_BIT; /* FINISHME[SKL]: Support Ys */
> -   *flags &= ~ISL_TILING_GEN10_Yf_BIT; /* FINISHME[SKL]: Support Yf */
> -   *flags &= ~ISL_TILING_GEN10_Ys_BIT; /* FINISHME[SKL]: Support Ys */
> -
>     if (isl_surf_usage_is_depth(info->usage)) {
>        /* Depth requires Y. */
>        *flags &= ISL_TILING_ANY_Y_MASK;
> diff --git a/src/intel/vulkan/anv_image.c b/src/intel/vulkan/anv_image.c
> index 388f9410564..82ce43ef2b9 100644
> --- a/src/intel/vulkan/anv_image.c
> +++ b/src/intel/vulkan/anv_image.c
> @@ -120,6 +120,9 @@ choose_isl_tiling_flags(const struct anv_image_create_info *anv_info,
>     if (isl_mod_info)
>        flags &= 1 << isl_mod_info->tiling;
>  
> +   /* We don't support Yf or Ys tiling yet */
> +   flags &= ISL_TILING_STD_Y_MASK;

This is missing a bitwise complement.

> +
>     assert(flags);
>  
>     return flags;
> diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
> index 36d080129fa..cfeb4d67d29 100644
> --- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
> +++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
> @@ -573,6 +573,11 @@ make_surface(struct brw_context *brw, GLenum target, mesa_format format,
>         num_samples, width0, height0, depth0,
>         first_level, last_level, mt);
>  
> +   /* We don't support Yf or Ys in i965 yet because we use the blitter too
> +    * much and it can't handle them.
> +    */

Didn't we stop using the blitter on newer platforms?

> +   tiling_flags &= ~ISL_TILING_STD_Y_MASK;
> +

Could we move this to miptree_create()?  There's another instance of the
requested set of tiling flags being modified there.

-Nanley

>     struct isl_surf_init_info init_info = {
>        .dim = get_isl_surf_dim(target),
>        .format = translate_tex_format(brw, format, false),
> -- 
> 2.19.1
> 
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