[Mesa-dev] [PATCH] intel/compiler: Reset default flag register in brw_find_live_channel()

Matt Turner mattst88 at gmail.com
Tue Jan 22 23:26:15 UTC 2019


On Tue, Jan 22, 2019 at 3:25 PM Francisco Jerez <currojerez at riseup.net> wrote:
>
> Matt Turner <mattst88 at gmail.com> writes:
>
> > emit_uniformize() emits SHADER_OPCODE_FIND_LIVE_CHANNEL with its
> > flag_subreg set, so that the IR knows which flag is accessed. However
> > the flag is only used on Gen7 in Align1 mode.
> >
> > To avoid setting unnecessary bits in the instruction words, get the
> > information we need and reset the default flag register. This allows
> > round-tripping through the assembler/disassembler.
> > ---
> >  src/intel/compiler/brw_eu_emit.c | 12 ++++++++++--
> >  1 file changed, 10 insertions(+), 2 deletions(-)
> >
> > diff --git a/src/intel/compiler/brw_eu_emit.c b/src/intel/compiler/brw_eu_emit.c
> > index 45e2552783b..7c5b40af3ae 100644
> > --- a/src/intel/compiler/brw_eu_emit.c
> > +++ b/src/intel/compiler/brw_eu_emit.c
> > @@ -3312,6 +3312,13 @@ brw_find_live_channel(struct brw_codegen *p, struct brw_reg dst,
> >
> >     brw_push_insn_state(p);
> >
> > +   /* The flag register is only used on Gen7 in align1 mode, so avoid setting
> > +    * unnecessary bits in the instruction words, get the information we need
> > +    * and reset the default flag register.
>
> Maybe mention here that this also allows more instructions to be
> compacted.  Looks good otherwise:
>
> Reviewed-by: Francisco Jerez <currojerez at riseup.net>

Sure, will do. Thanks Curro!


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