[Mesa-dev] [PATCH] intel/compiler: update validator to account for half-float exec type promotion

Matt Turner mattst88 at gmail.com
Thu Jan 24 18:36:21 UTC 2019


On Wed, Jan 23, 2019 at 6:03 AM Francisco Jerez <currojerez at riseup.net> wrote:
>
> Iago Toral Quiroga <itoral at igalia.com> writes:
>
> > Commit c84ec70b3a72 implemented execution type promotion to 32-bit for
> > conversions involving half-float registers, which empirical testing suggested
> > was required, but it did not incorporate this change into the assembly validator
> > logic. This commits adds that, preventing validation errors like this:
> >
>
> I don't think we should be validating empirical assumptions in the EU
> validator.

I kind of agree. I don't really know what we should do though.

I guess it's better to err on the side of caution in the EU validator
and only check restrictions that have documentation. Is that your
thinking?

Many instructions can only take certain conditional modifiers. XOR is
documented to only take .z/.nz. However we emit XOR with a .l
conditional mod for nir_op_imod. It works, and we think the
documentation is incomplete. Separately it describes how the
conditional modifiers operate, and .l only reads the high bit of the
result so it makes sense that XOR with .l should work like we see that
it does.

So, (1) empirically it works, (2) the documentation says it's not
allowed, but (3) there's a plausible explanation that the
documentation is wrong.

What should we do if we implement the conditional modifier checks in
the validator?


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