[Mesa-dev] [RFC 2/4] nir: Add a new ALU nir_op_imad

[Ilia Mirkin]

On Fri, Jan 25, 2019 at 10:58 AM Ilia Mirkin <imirkin at alum.mit.edu> wrote:
>
> IMAD_S24 isn't src0 * src1 + src2 though. I think this could be called
> imad24, which I suspect exits on many GPUs (nv50-era NVIDIA definitely
> had this, and I think maxwell+ has a variant of this implemented by
> XMAD):
>
> (src0 * src1) & 0xffffff + src2

And of course even that's wrong... the 24th bit has to get
sign-extended on that. Can express it with shifts.