[Mesa-dev] [PATCH 2/5] radeonsi: clear allocator_zeroed_memory with SDMA

[Marek Olšák]

From: Marek Olšák <marek.olsak at amd.com>

so that it can be used in parallel IBs.

This also removes the SO_FILLED_SIZE hack.
---
 src/gallium/drivers/radeonsi/si_buffer.c       | 4 ++++
 src/gallium/drivers/radeonsi/si_compute_blit.c | 9 +--------
 src/gallium/drivers/radeonsi/si_pipe.c         | 6 +++---
 src/gallium/drivers/radeonsi/si_pipe.h         | 2 +-
 4 files changed, 9 insertions(+), 12 deletions(-)

diff --git a/src/gallium/drivers/radeonsi/si_buffer.c b/src/gallium/drivers/radeonsi/si_buffer.c
index 03c11cb7013..bac561de2cb 100644
--- a/src/gallium/drivers/radeonsi/si_buffer.c
+++ b/src/gallium/drivers/radeonsi/si_buffer.c
@@ -235,20 +235,24 @@ bool si_alloc_resource(struct si_screen *sscreen,
 
 	util_range_set_empty(&res->valid_buffer_range);
 	res->TC_L2_dirty = false;
 
 	/* Print debug information. */
 	if (sscreen->debug_flags & DBG(VM) && res->b.b.target == PIPE_BUFFER) {
 		fprintf(stderr, "VM start=0x%"PRIX64"  end=0x%"PRIX64" | Buffer %"PRIu64" bytes\n",
 			res->gpu_address, res->gpu_address + res->buf->size,
 			res->buf->size);
 	}
+
+	if (res->b.b.flags & SI_RESOURCE_FLAG_CLEAR)
+		si_screen_clear_buffer(sscreen, &res->b.b, 0, res->bo_size, 0);
+
 	return true;
 }
 
 static void si_buffer_destroy(struct pipe_screen *screen,
 			      struct pipe_resource *buf)
 {
 	struct si_resource *buffer = si_resource(buf);
 
 	threaded_resource_deinit(buf);
 	util_range_destroy(&buffer->valid_buffer_range);
diff --git a/src/gallium/drivers/radeonsi/si_compute_blit.c b/src/gallium/drivers/radeonsi/si_compute_blit.c
index 1ea0d7517df..f5e9c02dd10 100644
--- a/src/gallium/drivers/radeonsi/si_compute_blit.c
+++ b/src/gallium/drivers/radeonsi/si_compute_blit.c
@@ -268,29 +268,22 @@ void si_clear_buffer(struct si_context *sctx, struct pipe_resource *dst,
 		pipe_buffer_write(&sctx->b, dst, offset, size, clear_value);
 	}
 }
 
 static void si_pipe_clear_buffer(struct pipe_context *ctx,
 				 struct pipe_resource *dst,
 				 unsigned offset, unsigned size,
 				 const void *clear_value,
 				 int clear_value_size)
 {
-	enum si_coherency coher;
-
-	if (dst->flags & SI_RESOURCE_FLAG_SO_FILLED_SIZE)
-		coher = SI_COHERENCY_CP;
-	else
-		coher = SI_COHERENCY_SHADER;
-
 	si_clear_buffer((struct si_context*)ctx, dst, offset, size, (uint32_t*)clear_value,
-			clear_value_size, coher);
+			clear_value_size, SI_COHERENCY_SHADER);
 }
 
 void si_copy_buffer(struct si_context *sctx,
 		    struct pipe_resource *dst, struct pipe_resource *src,
 		    uint64_t dst_offset, uint64_t src_offset, unsigned size)
 {
 	if (!size)
 		return;
 
 	enum si_coherency coher = SI_COHERENCY_SHADER;
diff --git a/src/gallium/drivers/radeonsi/si_pipe.c b/src/gallium/drivers/radeonsi/si_pipe.c
index 439b550c4cf..98059ddbf8b 100644
--- a/src/gallium/drivers/radeonsi/si_pipe.c
+++ b/src/gallium/drivers/radeonsi/si_pipe.c
@@ -423,23 +423,23 @@ static struct pipe_context *si_create_context(struct pipe_screen *screen,
 	    sctx->chip_class == VI ||
 	    sctx->chip_class == GFX9) {
 		sctx->eop_bug_scratch = si_resource(
 			pipe_buffer_create(&sscreen->b, 0, PIPE_USAGE_DEFAULT,
 					   16 * sscreen->info.num_render_backends));
 		if (!sctx->eop_bug_scratch)
 			goto fail;
 	}
 
 	sctx->allocator_zeroed_memory =
-			u_suballocator_create(&sctx->b, sscreen->info.gart_page_size,
-					      0, PIPE_USAGE_DEFAULT,
-					      SI_RESOURCE_FLAG_SO_FILLED_SIZE, true);
+		u_suballocator_create(&sctx->b, sscreen->info.gart_page_size,
+				      0, PIPE_USAGE_DEFAULT,
+				      SI_RESOURCE_FLAG_CLEAR, false);
 	if (!sctx->allocator_zeroed_memory)
 		goto fail;
 
 	sctx->b.stream_uploader = u_upload_create(&sctx->b, 1024 * 1024,
 						    0, PIPE_USAGE_STREAM,
 						    SI_RESOURCE_FLAG_READ_ONLY);
 	if (!sctx->b.stream_uploader)
 		goto fail;
 
 	sctx->b.const_uploader = u_upload_create(&sctx->b, 128 * 1024,
diff --git a/src/gallium/drivers/radeonsi/si_pipe.h b/src/gallium/drivers/radeonsi/si_pipe.h
index 1af3c5ff9b7..b01d5744752 100644
--- a/src/gallium/drivers/radeonsi/si_pipe.h
+++ b/src/gallium/drivers/radeonsi/si_pipe.h
@@ -102,21 +102,21 @@
 #define SI_MAP_BUFFER_ALIGNMENT		64
 #define SI_MAX_VARIABLE_THREADS_PER_BLOCK 1024
 
 #define SI_RESOURCE_FLAG_TRANSFER	(PIPE_RESOURCE_FLAG_DRV_PRIV << 0)
 #define SI_RESOURCE_FLAG_FLUSHED_DEPTH	(PIPE_RESOURCE_FLAG_DRV_PRIV << 1)
 #define SI_RESOURCE_FLAG_FORCE_MSAA_TILING (PIPE_RESOURCE_FLAG_DRV_PRIV << 2)
 #define SI_RESOURCE_FLAG_DISABLE_DCC	(PIPE_RESOURCE_FLAG_DRV_PRIV << 3)
 #define SI_RESOURCE_FLAG_UNMAPPABLE	(PIPE_RESOURCE_FLAG_DRV_PRIV << 4)
 #define SI_RESOURCE_FLAG_READ_ONLY	(PIPE_RESOURCE_FLAG_DRV_PRIV << 5)
 #define SI_RESOURCE_FLAG_32BIT		(PIPE_RESOURCE_FLAG_DRV_PRIV << 6)
-#define SI_RESOURCE_FLAG_SO_FILLED_SIZE	(PIPE_RESOURCE_FLAG_DRV_PRIV << 7)
+#define SI_RESOURCE_FLAG_CLEAR		(PIPE_RESOURCE_FLAG_DRV_PRIV << 7)
 
 enum si_clear_code
 {
 	DCC_CLEAR_COLOR_0000   = 0x00000000,
 	DCC_CLEAR_COLOR_0001   = 0x40404040,
 	DCC_CLEAR_COLOR_1110   = 0x80808080,
 	DCC_CLEAR_COLOR_1111   = 0xC0C0C0C0,
 	DCC_CLEAR_COLOR_REG    = 0x20202020,
 	DCC_UNCOMPRESSED       = 0xFFFFFFFF,
 };
-- 
2.17.1