[Mesa-dev] [PATCH 5/5] radv: only allocate a 32-bit value for the TC-compat range metadata
Bas Nieuwenhuizen
bas at basnieuwenhuizen.nl
Wed Jul 3 01:00:22 UTC 2019
r-b
On Tue, Jul 2, 2019 at 2:47 PM Samuel Pitoiset
<samuel.pitoiset at gmail.com> wrote:
>
> Signed-off-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
> ---
> src/amd/vulkan/radv_image.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/src/amd/vulkan/radv_image.c b/src/amd/vulkan/radv_image.c
> index eeccce0d82f..dc598d9eecf 100644
> --- a/src/amd/vulkan/radv_image.c
> +++ b/src/amd/vulkan/radv_image.c
> @@ -990,8 +990,8 @@ radv_image_alloc_htile(struct radv_image *image)
> * have to be fixed by updating ZRANGE_PRECISION when doing
> * fast depth clears to 0.0f.
> */
> - image->tc_compat_zrange_offset = image->clear_value_offset + 8;
> - image->size = image->clear_value_offset + 16;
> + image->tc_compat_zrange_offset = image->size;
> + image->size = image->tc_compat_zrange_offset + 4;
> }
> image->alignment = align64(image->alignment, image->planes[0].surface.htile_alignment);
> }
> --
> 2.22.0
>
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