[Mesa-dev] [PATCH 09/42] panfrost/midgard: Move blend type conversion into NIR

[Alyssa Rosenzweig]

Now that we have u2u8 implemented, we can move everything up into NIR
and eliminate the silly "blend epilogue" (no such thing; it's just a
fragment epilogue).

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
---
 .../panfrost/midgard/midgard_compile.c        | 63 +------------------
 .../panfrost/midgard/nir_lower_framebuffer.c  |  8 ++-
 2 files changed, 8 insertions(+), 63 deletions(-)

diff --git a/src/gallium/drivers/panfrost/midgard/midgard_compile.c b/src/gallium/drivers/panfrost/midgard/midgard_compile.c
index dba6cb2f6f9..0f51104a19d 100644
--- a/src/gallium/drivers/panfrost/midgard/midgard_compile.c
+++ b/src/gallium/drivers/panfrost/midgard/midgard_compile.c
@@ -2375,64 +2375,6 @@ emit_fragment_epilogue(compiler_context *ctx)
         EMIT(alu_br_compact_cond, midgard_jmp_writeout_op_writeout, TAG_ALU_4, -1, midgard_condition_always);
 }
 
-/* For the blend epilogue, we need to convert the blended fragment vec4 (stored
- * in r0) to a RGBA8888 value by scaling and type converting. We then output it
- * with the int8 analogue to the fragment epilogue */
-
-static void
-emit_blend_epilogue(compiler_context *ctx)
-{
-        /* fmov hr48, [...], r0*/
-
-        midgard_instruction scale = {
-                .type = TAG_ALU_4,
-                .unit = UNIT_VMUL,
-                .ssa_args = {
-                        .src0 = SSA_FIXED_REGISTER(24),
-                        .src1 = SSA_FIXED_REGISTER(0),
-                        .dest = SSA_FIXED_REGISTER(24),
-                },
-                .alu = {
-                        .op = midgard_alu_op_fmov,
-                        .reg_mode = midgard_reg_mode_32,
-                        .dest_override = midgard_dest_override_lower,
-                        .mask = 0xFF,
-                        .src1 = vector_alu_srco_unsigned(blank_alu_src),
-                        .src2 = vector_alu_srco_unsigned(blank_alu_src),
-                }
-        };
-
-        emit_mir_instruction(ctx, scale);
-
-        /* vadd.f2u_rte qr0, hr48, #0 */
-
-        midgard_vector_alu_src alu_src = blank_alu_src;
-        alu_src.half = true;
-
-        midgard_instruction f2u_rte = {
-                .type = TAG_ALU_4,
-                .ssa_args = {
-                        .src0 = SSA_FIXED_REGISTER(24),
-                        .src1 = SSA_UNUSED_0,
-                        .dest = SSA_FIXED_REGISTER(0),
-                        .inline_constant = true
-                },
-                .alu = {
-                        .op = midgard_alu_op_f2u_rte,
-                        .reg_mode = midgard_reg_mode_16,
-                        .dest_override = midgard_dest_override_lower,
-                        .mask = 0xF,
-                        .src1 = vector_alu_srco_unsigned(alu_src),
-                        .src2 = vector_alu_srco_unsigned(blank_alu_src),
-                }
-        };
-
-        emit_mir_instruction(ctx, f2u_rte);
-
-        EMIT(alu_br_compact_cond, midgard_jmp_writeout_op_writeout, TAG_ALU_4, 0, midgard_condition_always);
-        EMIT(alu_br_compact_cond, midgard_jmp_writeout_op_writeout, TAG_ALU_4, -1, midgard_condition_always);
-}
-
 static midgard_block *
 emit_block(compiler_context *ctx, nir_block *block)
 {
@@ -2469,10 +2411,7 @@ emit_block(compiler_context *ctx, nir_block *block)
         /* Append fragment shader epilogue (value writeout) */
         if (ctx->stage == MESA_SHADER_FRAGMENT) {
                 if (block == nir_impl_last_block(ctx->func->impl)) {
-                        if (ctx->is_blend)
-                                emit_blend_epilogue(ctx);
-                        else
-                                emit_fragment_epilogue(ctx);
+                        emit_fragment_epilogue(ctx);
                 }
         }
 
diff --git a/src/gallium/drivers/panfrost/midgard/nir_lower_framebuffer.c b/src/gallium/drivers/panfrost/midgard/nir_lower_framebuffer.c
index 202b3658a28..580df9d7442 100644
--- a/src/gallium/drivers/panfrost/midgard/nir_lower_framebuffer.c
+++ b/src/gallium/drivers/panfrost/midgard/nir_lower_framebuffer.c
@@ -44,8 +44,14 @@
 static nir_ssa_def *
 nir_float_to_native(nir_builder *b, nir_ssa_def *c_float)
 {
+   /* First, we scale from [0, 1] to [0, 255.0] */
    nir_ssa_def *scaled = nir_fmul_imm(b, nir_fsat(b, c_float), 255.0);
-   return scaled;
+
+   /* Next, we type convert */
+   nir_ssa_def *converted = nir_u2u8(b, nir_f2u32(b,
+            nir_fround_even(b, scaled)));
+
+   return converted;
 }
 
 void
-- 
2.20.1