[Mesa-dev] [PATCH 4/4] radv/gfx10: do not always execute a barrier before the second shader
Samuel Pitoiset
samuel.pitoiset at gmail.com
Thu Jul 18 08:07:57 UTC 2019
On 7/18/19 2:29 AM, Bas Nieuwenhuizen wrote:
> On Wed, Jul 17, 2019 at 3:44 PM Samuel Pitoiset
> <samuel.pitoiset at gmail.com> wrote:
>> With NGG, empty waves may still be required to export data.
>>
>> This fixes dEQP-VK.ycbcr.format.*_unorm.geometry_*.
>>
>> Signed-off-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
>> ---
>> src/amd/vulkan/radv_nir_to_llvm.c | 31 ++++++++++++++++++++++++++++++-
>> 1 file changed, 30 insertions(+), 1 deletion(-)
>>
>> diff --git a/src/amd/vulkan/radv_nir_to_llvm.c b/src/amd/vulkan/radv_nir_to_llvm.c
>> index 3e18303879e..7e623414adc 100644
>> --- a/src/amd/vulkan/radv_nir_to_llvm.c
>> +++ b/src/amd/vulkan/radv_nir_to_llvm.c
>> @@ -4448,8 +4448,37 @@ LLVMModuleRef ac_translate_nir_to_llvm(struct ac_llvm_compiler *ac_llvm,
>> declare_esgs_ring(&ctx);
>> }
>>
>> - if (i)
>> + bool nested_barrier = false;
>> +
>> + if (i) {
>> + if (shaders[i]->info.stage == MESA_SHADER_GEOMETRY &&
>> + ctx.options->key.vs_common_out.as_ngg) {
>> + nested_barrier = false;
>> + } else {
>> + nested_barrier = true;
>> + }
>> + }
> We can simplify this to
>
> nested_barrier = i && (shaders[i]->info.stage != MESA_SHADER_GEOMETRY
> || !ctx.options->key.vs_common_out.as_ngg);
>
> Otherwise r-b, I'm just surprised an s_barrier is okay.
I'm going to move the NGG GS prologue into that inner if, so I would
prefer to keep this way.
>> +
>> + if (nested_barrier) {
>> + /* Execute a barrier before the second shader in
>> + * a merged shader.
>> + *
>> + * Execute the barrier inside the conditional block,
>> + * so that empty waves can jump directly to s_endpgm,
>> + * which will also signal the barrier.
>> + *
>> + * This is possible in gfx9, because an empty wave
>> + * for the second shader does not participate in
>> + * the epilogue. With NGG, empty waves may still
>> + * be required to export data (e.g. GS output vertices),
>> + * so we cannot let them exit early.
>> + *
>> + * If the shader is TCS and the TCS epilog is present
>> + * and contains a barrier, it will wait there and then
>> + * reach s_endpgm.
>> + */
>> ac_emit_barrier(&ctx.ac, ctx.stage);
>> + }
>>
>> nir_foreach_variable(variable, &shaders[i]->outputs)
>> scan_shader_output_decl(&ctx, variable, shaders[i], shaders[i]->info.stage);
>> --
>> 2.22.0
>>
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