[Mesa-dev] [PATCH 7/7] radv/gfx10: update descriptors for inline uniform blocks

[Bas Nieuwenhuizen]

On Thu, Jul 18, 2019 at 3:51 PM Samuel Pitoiset
<samuel.pitoiset at gmail.com> wrote:
>
> Signed-off-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
> ---
>  src/amd/vulkan/radv_nir_to_llvm.c | 13 ++++++++++---
>  1 file changed, 10 insertions(+), 3 deletions(-)
>
> diff --git a/src/amd/vulkan/radv_nir_to_llvm.c b/src/amd/vulkan/radv_nir_to_llvm.c
> index 6feb55e3916..19dcae3a476 100644
> --- a/src/amd/vulkan/radv_nir_to_llvm.c
> +++ b/src/amd/vulkan/radv_nir_to_llvm.c
> @@ -1373,9 +1373,16 @@ radv_load_resource(struct ac_shader_abi *abi, LLVMValueRef index,
>                 uint32_t desc_type = S_008F0C_DST_SEL_X(V_008F0C_SQ_SEL_X) |
>                         S_008F0C_DST_SEL_Y(V_008F0C_SQ_SEL_Y) |
>                         S_008F0C_DST_SEL_Z(V_008F0C_SQ_SEL_Z) |
> -                       S_008F0C_DST_SEL_W(V_008F0C_SQ_SEL_W) |
> -                       S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT) |
> -                       S_008F0C_DATA_FORMAT(V_008F0C_BUF_DATA_FORMAT_32);
> +                       S_008F0C_DST_SEL_W(V_008F0C_SQ_SEL_W);
> +
> +               if (ctx->ac.chip_class >= GFX10) {
> +                       desc_type |= S_008F0C_FORMAT(V_008F0C_IMG_FORMAT_32_FLOAT) |
> +                                    S_008F0C_OOB_SELECT(3) |

We really should get some enum/define values for OOB_SELECT.

Anyway, not a blocker

Reviewed-by: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>

for the series
> +                                    S_008F0C_RESOURCE_LEVEL(1);
> +               } else {
> +                       desc_type |= S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT) |
> +                                    S_008F0C_DATA_FORMAT(V_008F0C_BUF_DATA_FORMAT_32);
> +               }
>
>                 LLVMValueRef desc_components[4] = {
>                         LLVMBuildPtrToInt(ctx->ac.builder, desc_ptr, ctx->ac.intptr, ""),
> --
> 2.22.0
>
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