[Mesa-dev] [PATCH] radv/gfx10: do not use the fast depth or stencil clear bytes path

[Bas Nieuwenhuizen]

r-b

On Mon, Jul 29, 2019 at 2:35 PM Samuel Pitoiset
<samuel.pitoiset at gmail.com> wrote:
>
>
> On 7/29/19 2:30 PM, Bas Nieuwenhuizen wrote:
> > On Mon, Jul 29, 2019 at 2:20 PM Samuel Pitoiset
> > <samuel.pitoiset at gmail.com> wrote:
> >>
> >> On 7/29/19 2:15 PM, Bas Nieuwenhuizen wrote:
> >>> On Mon, Jul 29, 2019 at 2:11 PM Samuel Pitoiset
> >>> <samuel.pitoiset at gmail.com> wrote:
> >>>> The HTILE masks seem to be different and so we need to rework that
> >>>> path. Just disabled for now and implement later.
> >>> The HTILE masks are not different per amdvlk?
> >>>
> >>> Can you at least rework the commit message to reflect that?
> >> "It needs to be reworked on GFX10, so just disable it for now." ?
> > How about just "It causes issues on GFX10"? We don't know it needs to
> > be reworked either?
> Looks like it needs but whatever, I'm fine with that, so Rb?
> >
> >
> >>>> This fixes rendering issues with vkmark and Wreckfest at least.
> >>>>
> >>>> Signed-off-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
> >>>> ---
> >>>>    src/amd/vulkan/radv_meta_clear.c | 5 +++--
> >>>>    1 file changed, 3 insertions(+), 2 deletions(-)
> >>>>
> >>>> diff --git a/src/amd/vulkan/radv_meta_clear.c b/src/amd/vulkan/radv_meta_clear.c
> >>>> index b93ba3e0b29..8ddc2e38cd4 100644
> >>>> --- a/src/amd/vulkan/radv_meta_clear.c
> >>>> +++ b/src/amd/vulkan/radv_meta_clear.c
> >>>> @@ -1005,7 +1005,7 @@ radv_can_fast_clear_depth(struct radv_cmd_buffer *cmd_buffer,
> >>>>           if (!view_mask && clear_rect->layerCount != iview->image->info.array_size)
> >>>>                   return false;
> >>>>
> >>>> -       if (cmd_buffer->device->physical_device->rad_info.chip_class < GFX9 &&
> >>>> +       if (cmd_buffer->device->physical_device->rad_info.chip_class != GFX9 &&
> >>>>               (!(aspects & VK_IMAGE_ASPECT_DEPTH_BIT) ||
> >>>>               ((vk_format_aspects(iview->image->vk_format) & VK_IMAGE_ASPECT_STENCIL_BIT) &&
> >>>>                !(aspects & VK_IMAGE_ASPECT_STENCIL_BIT))))
> >>>> @@ -1048,7 +1048,8 @@ radv_fast_clear_depth(struct radv_cmd_buffer *cmd_buffer,
> >>>>                                                 iview->image->planes[0].surface.htile_size, clear_word);
> >>>>           } else {
> >>>>                   /* Only clear depth or stencil bytes in the HTILE buffer. */
> >>>> -               assert(cmd_buffer->device->physical_device->rad_info.chip_class >= GFX9);
> >>>> +               /* TODO: Implement that path for GFX10. */
> >>>> +               assert(cmd_buffer->device->physical_device->rad_info.chip_class == GFX9);
> >>>>                   flush_bits = clear_htile_mask(cmd_buffer, iview->image->bo,
> >>>>                                                 iview->image->offset + iview->image->htile_offset,
> >>>>                                                 iview->image->planes[0].surface.htile_size, clear_word,
> >>>> --
> >>>> 2.22.0
> >>>>
> >>>> _______________________________________________
> >>>> mesa-dev mailing list
> >>>> mesa-dev at lists.freedesktop.org
> >>>> https://lists.freedesktop.org/mailman/listinfo/mesa-dev